IP Library Granted Patent US 9,791,346
Granted Patent B1
US 9,791,346 · App. 15/133,614 · Granted Oct 17, 2017

Semiconductor device and wafer with reference circuit and related methods

Inventors: Jean-Francois Carpentier (Grenoble, FR); Patrick Lemaitre (Biviers, FR); Jean-Robert Manouvrier (Echirolles, FR); Charles Baudot (Lumbin, FR); Bertrand Borot (Le Cheylas, FR)
Assignees: STMICROELECTRONICS SA; STMICROELECTRONICS (CROLLES 2) SAS
G01M11/02G02B6/12004G02B6/2808G02B6/34
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Quick Facts
Patent No.
US 9,791,346
App. No.
15/133,614
Granted
Oct 17, 2017
Kind
B1
Abstract

A semiconductor device may include a semiconductor wafer, and a reference circuit carried by the semiconductor wafer. The reference circuit may include optical DUTs, a first set of photodetectors coupled to outputs of the optical DUTs, an optical splitter coupled to inputs of the optical DUTs, and a second set of photodetectors coupled to the optical splitter. The optical splitter is to be coupled to an optical source and configured to transmit a reference optical signal to the first set of photodetectors via the optical DUTs and the second set of photodetectors.

Claims (53)

1. A semiconductor device comprising:

a semiconductor layer; and

at least one reference circuit carried by said semiconductor layer, said at least one reference circuit comprising

a plurality of optical devices under tests (DUTs),

a first set of photodetectors coupled to outputs of said plurality of optical DUTs,

at least one optical splitter coupled to inputs of said plurality of optical DUTs, and

a second set of photodetectors coupled to said at least one optical splitter,

said at least one optical splitter to be coupled to an optical source and configured to transmit a reference optical signal to said first set of photodetectors via said plurality of optical DUTs and said second set of photodetectors.

2. The semiconductor device of claim 1 wherein said at least one optical splitter comprises first and second optical splitters; wherein said first optical splitter is coupled to the inputs of said plurality of optical DUTs; and wherein said second optical splitter is coupled to inputs of said second set of photodetectors.

3. The semiconductor device of claim 1 wherein said at least one optical splitter comprises a single optical splitter.

4. The semiconductor device of claim 1 wherein said at least one reference circuit comprises a first plurality of output terminals respectively coupled to said first set of photodetectors.

5. The semiconductor device of claim 1 wherein said at least one reference circuit comprises a summer circuit configured to sum outputs of said second set of photodetectors.

6. The semiconductor device of claim 1 wherein said at least one reference circuit comprises a second plurality of output terminals respectively coupled to outputs of said second set of photodetectors.

7. The semiconductor device of claim 1 wherein said first set of photodetectors is spaced apart from said second set of photodetectors.

8. The semiconductor device of claim 1 wherein said at least one optical splitter comprises a balanced optical splitter.

9. The semiconductor device of claim 1 wherein said at least one reference circuit comprises a grating coupler coupled to an input of said at least one optical splitter.

10. A semiconductor wafer comprising:

a semiconductor wafer device; and

at least one reference circuit carried by said semiconductor wafer device, said at least one reference circuit comprising

a plurality of optical devices under tests (DUTs),

a first set of photodetectors coupled to outputs of said plurality of optical DUTs,

at least one optical splitter coupled to inputs of said plurality of optical DUTs, and

a second set of photodetectors coupled to said at least one optical splitter,

said at least one optical splitter to be coupled to an optical source and configured to transmit a reference optical signal to said first set of photodetectors via said plurality of optical DUTs and said second set of photodetectors.

11. The semiconductor wafer of claim 10 wherein said at least one optical splitter comprises first and second optical splitters; wherein said first optical splitter is coupled to the inputs of said plurality of optical DUTs; and wherein said second optical splitter is coupled to inputs of said second set of photodetectors.

12. The semiconductor wafer of claim 10 wherein said at least one optical splitter comprises a single optical splitter.

13. The semiconductor wafer of claim 10 wherein said at least one reference circuit comprises a first plurality of output terminals respectively coupled to said first set of photodetectors.

14. The semiconductor wafer of claim 10 wherein said at least one reference circuit comprises a summer circuit configured to sum outputs of said second set of photodetectors.

15. The semiconductor wafer of claim 10 wherein said at least one reference circuit comprises a second plurality of output terminals respectively coupled to outputs of said second set of photodetectors.

16. The semiconductor wafer of claim 10 wherein said semiconductor wafer device comprises a plurality of integrated circuits (ICs), and a plurality of scribe lines therebetween; and wherein said at least one reference circuit is carried within said plurality of scribe lines.

17. A method for testing a semiconductor device comprising at least one reference circuit, the at least one reference circuit comprising a plurality of optical devices under tests (DUTs), a first set of photodetectors coupled to outputs of the plurality of optical DUTs, at least one optical splitter coupled to inputs of the plurality of optical DUTs, and a second set of photodetectors coupled to the at least one optical splitter, the method comprising:

coupling the at least one optical splitter to an optical source for transmitting a reference optical signal to the first set of photodetectors via the plurality of optical DUTs and the second set of photodetectors; and

determining an optical loss of the plurality of optical DUTs based upon a difference in electrical output between the first and second sets of photodetectors.

18. The method of claim 17 wherein the at least one optical splitter comprises first and second optical splitters; wherein the first optical splitter is coupled to the inputs of the plurality of optical DUTs; and wherein the second optical splitter is coupled to inputs of the second set of photodetectors.

19. The method of claim 17 wherein the at least one optical splitter comprises a single optical splitter.

20. The method of claim 17 wherein the at least one reference circuit comprises a first plurality of output terminals respectively coupled to the first set of photodetectors.

21. The method of claim 17 wherein the at least one reference circuit comprises a summer circuit configured to sum outputs of the second set of photodetectors.

22. The method of claim 17 wherein the at least one reference circuit comprises a second plurality of output terminals respectively coupled to outputs of the second set of photodetectors.

23. The method of claim 17 wherein the first set of photodetectors is spaced apart from the second set of photodetectors.

24. The method of claim 17 wherein the at least one optical splitter comprises a balanced optical splitter.

25. The method of claim 17 wherein the at least one reference circuit comprises a grating coupler coupled to an input of the at least one optical splitter.

26. A method for making a semiconductor device comprising:

forming at least one reference circuit carried by a semiconductor wafer; and

forming the at least one reference circuit to comprise

a plurality of optical devices under tests (DUTs),

a first set of photodetectors coupled to outputs of the plurality of optical DUTs,

at least one optical splitter coupled to inputs of the plurality of optical DUTs, and

a second set of photodetectors coupled to the at least one optical splitter,

the at least one optical splitter to be coupled to an optical source and configured to transmit a reference optical signal to the first set of photodetectors via the plurality of optical DUTs and the second set of photodetectors.

27. The method of claim 26 wherein the at least one optical splitter comprises first and second optical splitters; wherein the first optical splitter is coupled to the inputs of the plurality of optical DUTs; and wherein the second optical splitter is coupled to inputs of the second set of photodetectors.

28. The method of claim 26 wherein the at least one optical splitter comprises a single optical splitter.

29. The method of claim 26 wherein the at least one reference circuit comprises a first plurality of output terminals respectively coupled to the first set of photodetectors.

30. The method of claim 26 wherein the at least one reference circuit comprises a summer circuit configured to sum outputs of the second set of photodetectors.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 10, 2023
From: STMICROELECTRONICS (CROLLES 2) SAS
To: STMICROELECTRONICS INTERNATIONAL N.V.
Reel/Frame 063276/0569 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 10, 2023
From: STMICROELECTRONICS SA
To: STMICROELECTRONICS INTERNATIONAL N.V.
Reel/Frame 063277/0222 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 25, 2016
From: MANOUVRIER, JEAN-ROBERT
To: STMICROELECTRONICS SA
Reel/Frame 038368/0925 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 25, 2016
From: CARPENTIER, JEAN-FRANCOIS; LEMAITRE, PATRICK; BAUDOT, CHARLES; BOROT, BERTRAND
To: STMICROELECTRONICS (CROLLES 2) SAS
Reel/Frame 038369/0046 →