IP Library Granted Patent US 9,685,951
Granted Patent B2
US 9,685,951 · App. 15/134,513 · Granted Jun 20, 2017

Integrated circuit with configurable on-die termination

Inventor: Huy Nguyen (San Jose, CA)
Assignee: Rambus Inc.
H03K19/0005H04B1/0458H04L25/0278H04L25/0298
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Quick Facts
Patent No.
US 9,685,951
App. No.
15/134,513
Granted
Jun 20, 2017
Kind
B2
Abstract

Described are integrated-circuit die with differential receivers, the inputs of which are coupled to external signal pads. Termination legs coupled to the signal pads support multiple termination topologies. These termination legs can support adjustable impedances, capacitances, or both, which may be controlled using an integrated memory.

Claims (32)

1. An integrated circuit (IC) comprising:

differential pads to receive a differential signal, the differential pads including a first pad and a second pad; and

on-die termination circuitry that includes:

a common node;

a first termination leg extending between the common node and the first pad, the first termination leg including a first termination impedance;

a second termination leg extending between the common node and the second pad, the second termination leg including a second termination impedance; and

a third termination leg extending between the common node and a reference-voltage node, the third termination leg including a switch to selectively couple the common node to the reference-voltage node.

2. The IC of claim 1 , the IC further including a receiver having a first input terminal coupled to the first pad and a second input terminal coupled to the second pad.

3. The IC of claim 1 , wherein at least one of the first termination impedance and the second termination impedance is adjustable.

4. The IC of claim 1 , wherein at least one of the first termination leg and the second termination leg includes a second switch.

5. The IC of claim 1 , further comprising a memory coupled to the switch to deliver a select signal to the switch.

6. The IC of claim 5 , wherein the switch includes a transistor having a control terminal, and wherein the memory includes an output connected to the control terminal to deliver the select signal.

7. The IC of claim 1 , wherein the third termination leg includes a capacitor.

8. The IC of claim 7 , wherein the capacitor includes a control terminal to control a programmable capacitance, the IC further including a memory having an output connected to the control terminal.

9. The IC of claim 7 , wherein the capacitor is connected in series with the switch.

10. The IC of claim 1 , the third termination leg further comprising an adjustable termination.

11. The IC of claim 10 , wherein the adjustable termination comprises a third termination impedance.

12. The IC of claim 11 , wherein the third termination impedance is connected in series with the switch.

13. The IC of claim 1 , wherein the reference-voltage node is connected to ground.

14. A computer-readable medium having stored thereon a non-transitory data structure defining an integrated circuit, the non-transitory data structure comprising:

first data representing differential pads to receive a differential signal, the differential pads including a first pad and a second pad; and

second data defining on-die termination circuitry that includes:

a common node;

a first termination impedance between the common node and the first pad;

a second termination impedance between the common node and the second pad; and

a switch to selectively couple the common node to a reference-voltage node.

15. The computer-readable medium of claim 14 , wherein the switch to selectively couple the common node to the reference-voltage node includes a resistor.

16. The computer-readable medium of claim 14 , wherein at least one of the first termination impedance and the second termination impedance is adjustable.

17. The computer-readable medium of claim 14 , on-die termination circuity further includes a first switch in series with the first termination impedance and a second switch in series with the second termination impedance.

18. The computer-readable medium of claim 14 , further comprising third data defining a memory coupled to the switch to deliver a select signal to the switch.

19. The computer-readable medium of claim 14 , the on-die termination circuit further including a capacitor in series with the switch.

20. The computer-readable medium of claim 19 , wherein the capacitor includes a control terminal to control a programmable capacitance.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 27, 2016
From: NGUYEN, HUY
To: RAMBUS INC.
Reel/Frame 038395/0942 →
Continuity (8)
Continuation 14598990 · Jan 16, 2015
Continuation 13906219 · May 30, 2013
Continuation 13312762 · Dec 6, 2011
Continuation 13023993 · Feb 9, 2011
Continuation 12790381 · May 28, 2010
Continuation 12288612 · Oct 21, 2008
Continuation 11313054 · Dec 19, 2005
Related Publication 20160233864A1 · Aug 11, 2016