IP Library › Granted Patent US 10,115,251
Granted Patent B2
US 10,115,251 · App. 15/141,676 · Granted Oct 30, 2018

Semiconductor device

Inventors: Osamu Soma (Tokyo, JP); Akira Uemura (Tokyo, JP)
Assignee: RENESAS ELECTRONICS CORPORATION
G07C9/00182H03K19/017509H05B33/089H05B33/0815B60Q11/005F02N11/0807H01L2224/48247H01L2224/49171H01L2924/181Y02B20/341
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Quick Facts
Patent No.
US 10,115,251
App. No.
15/141,676
Granted
Oct 30, 2018
Kind
B2
Abstract

A sophisticated semiconductor device is provided. A semiconductor device including an IPD chip and an MCU chip which are included in one package. The IPD chip includes: a power transistor that drives an external load; a gate drive circuit that drives the power transistor; and a protection circuit that protects the power transistor from having a breakdown. The MCU chip includes an arithmetic processing unit that performs arithmetic processing based on detected data output from the protection circuit, and a storage unit that stores a program for the arithmetic processing unit. The MCU chip has a function of controlling operation of the power transistor according to the detected data.

Claims (73)

1. A semiconductor device comprising:

a first semiconductor chip; and

a second semiconductor chip, the first semiconductor chip and the second semiconductor chip being included in one package, wherein

the first semiconductor chip includes:

a power transistor that drives an external load;

a drive circuit that drives the power transistor; and

a protection circuit that prevents the power transistor from having a breakdown,

the second semiconductor chip includes:

an arithmetic processing unit that performs arithmetic processing based on detected data output from the protection circuit; and

a storage unit that stores a program for the arithmetic processing unit, and

the second semiconductor chip has a function of controlling operation of the power transistor according to the detected data.

2. The semiconductor device according to claim 1 , wherein

the detected data includes analog data,

the second semiconductor chip includes an AD converter that converts the analog data into digital data, and

the arithmetic processing unit performs arithmetic processing on the digital data.

3. The semiconductor device according to claim 2 , wherein

the protection circuit includes a temperature detection circuit that detects a temperature of the power transistor,

the detected data includes temperature data output from the temperature detection circuit,

the AD converter converts the temperature data into digital data, and

the second semiconductor chip has a function of controlling operation of the power transistor according to the temperature data.

4. The semiconductor device according to claim 1 , wherein

the first semiconductor chip further includes a current detection circuit that detects a current flowing through the power transistor, and

the first semiconductor chip has a function of transmitting a signal based on the detected current to the second semiconductor chip.

5. The semiconductor device according to claim 1 , wherein

the protection circuit includes an overheat detection circuit that detects an overheat state of the power transistor, and

the protection circuit has a function of interrupting the operation of the power transistor when the overheat state is detected.

6. The semiconductor device according to claim 1 , wherein

the first and second semiconductor chips are mounted on a conductive island portion, and

the first and second semiconductor chips are sealed with an insulating resin.

7. The semiconductor device according to claim 6 , wherein a back surface of the island portion is exposed from the resin.

8. A semiconductor device comprising:

a first semiconductor chip; and

a second semiconductor chip, the first semiconductor chip and the second semiconductor chip being included in one package, wherein

the first semiconductor chip includes:

an arithmetic processing unit that performs a logical operation; and

a storage unit that stores a program for the arithmetic processing unit, and

the second semiconductor chip includes:

a power transistor that drives an external load;

a drive circuit that drives the power transistor;

a protection circuit that protects the power transistor; and

a first level shift circuit that steps down a voltage of an externally input signal to be output to the first semiconductor chip.

9. The semiconductor device according to claim 8 , wherein the second semiconductor chip further includes a second level shift circuit that boosts a signal output from the first semiconductor chip to output the signal to an outside.

10. The semiconductor device according to claim 8 , wherein

the first and second semiconductor chips are mounted on a conductive island portion, and

the first and second semiconductor chips are sealed with an insulating resin.

11. The semiconductor device according to claim 10 , wherein

a plurality of lead portions are arranged around the island portion, and

the first level shift circuit and a first lead portion in the plurality of lead portions are electrically connected with a first conductive wire.

12. The semiconductor device according to claim 8 , wherein the first semiconductor chip and the second semiconductor chip are connected with a third conductive wire.

13. A semiconductor device comprising:

a first semiconductor chip; and

a second semiconductor chip, the first semiconductor chip and the second semiconductor chip being included in one package, wherein

the first semiconductor chip includes:

an arithmetic processing unit that performs a logical operation; and

a storage unit that stores a program for the arithmetic processing unit, and

the second semiconductor chip includes:

a power transistor that drives a first external load;

a drive circuit that drives the power transistor;

a protection circuit that protects the power transistor; and

a driver circuit that drives a second external load with power consumption smaller than that of the first external load.

14. The semiconductor device according to claim 13 , wherein

the first external load is a head lamp or an indicator bulb of a vehicle, and

the second external load is an LED for an indicator, or a buzzer of a vehicle.

15. The semiconductor device according to claim 13 , wherein

the first and second semiconductor chips are mounted on a conductive island portion, and

the first and second semiconductor chips are sealed with an insulating resin.

16. The semiconductor device according to claim 15 , wherein

a plurality of lead portions are arranged around the island portion, and

the driver circuit and a first lead portion in the plurality of lead portions are electrically connected with a first conductive wire.

17. The semiconductor device according to claim 13 , wherein the first semiconductor chip and the second semiconductor chip are connected with a third conductive wire.

18. The semiconductor device according to claim 1 , wherein the first and second semiconductor chips are mounted side-by-side on a substrate.

19. The semiconductor device according to claim 1 , wherein the protection circuit includes a temperature detection circuit that detects a temperature of the power transistor.

20. The semiconductor device according to claim 1 , wherein the protection circuit includes an overheat detection circuit that detects an overheat state of the power transistor.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 29, 2016
From: SOMA, OSAMU; UEMURA, AKIRA
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 038425/0623 →
Priority Claims (1)
JP 2015-117957 · Jun 11, 2015 · national
Continuity (1)
Related Publication 20160365721A1 · Dec 15, 2016
Cited By (1)
US 12,416,937