IP Library Granted Patent US 9,988,260
Granted Patent B2
US 9,988,260 · App. 15/142,381 · Granted Jun 5, 2018

Rough MEMS surface

Inventors: Ruben B. Montez (Austin, TX); Arvind S. Salian (Austin, TX); Robert F. Steimle (Austin, TX)
Assignee: NXP USA, Inc.
B81B3/001B81C1/00976B81B2201/0235B81B2203/0315B81C2201/0132B81C2201/115B81C2203/0118
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Quick Facts
Patent No.
US 9,988,260
App. No.
15/142,381
Granted
Jun 5, 2018
Kind
B2
Abstract

A surface of a cavity of a MEMS device that is rough to reduce stiction. In some embodiments, the average roughness (Ra) of the surface is 5 nm or greater. In some embodiments, the rough surface is formed by forming one or more layers of a rough oxidizable material, then oxidizing the material to form an oxide layer with a rough surface. Another layer is formed over the oxide layer with the rough surface, wherein the roughness of the oxide layer is transferred to the another layer.

Claims (47)

1. A method of forming an exposed surface for a MEMS device, the method comprising:

forming a layer of oxidizable material over a substrate layer;

oxidizing the layer of oxidizable material, wherein the oxidizing forms an oxide layer, the oxide layer has a top surface;

forming a layer of a first material over the oxide layer;

exposing at least a portion of the layer of the first material wherein the exposing includes removing at least a portion of the oxide layer;

wherein the MEMS device includes a cavity, wherein an exposed portion of the layer of first material defines a portion of the cavity, and

wherein forming the layer of oxidizable material includes depositing the oxidizable material of the layer of oxidizable material in the presence of a gaseous hydrochloric acid in which a silicon containing gas is used as a reactant in the depositing, and wherein the percentage of the gaseous hydrochloric acid of a total flow of the gaseous hydrochloric acid and the silicon containing gas is at least 15%.

2. The method of claim 1 further comprising:

forming a partial opening in the oxide layer prior to forming the layer of a first material, wherein a thickness of the oxide layer is reduced at the partial opening, wherein the forming the layer of the first material includes filling the partial opening with the first material, wherein the first material filled in the partial opening defines a travel stop in the cavity.

3. The method of claim 2 wherein the travel stop has a top surface with an average roughness (R a ) in a range of 5 nm to 50 nm.

4. The method of claim 1 wherein the exposed portion of the layer of the first material has an average roughness (R a ) in a range of 5 nm to 50 nm.

5. The method of claim 1 wherein the percentage of the gaseous hydrochloric acid of the total flow of the gaseous hydrochloric acid and the silicon containing gas is in a range of 15%-30%.

6. The method of claim 1 wherein the percentage of the gaseous hydrochloric acid of the total flow of the gaseous hydrochloric acid and the silicon containing gas is in a range of 18%-23%.

7. The method of claim 1 wherein the forming the layer of oxidizable material includes using a dopant containing gas as a reactant in the depositing oxidizable material of the layer of oxidizable material.

8. The method of claim 1 wherein the forming the layer of oxidizable material comprises:

depositing a first layer of oxidizable material;

partially etching the first layer of oxidizable material to reduce a thickness of the first layer of oxidizable material;

depositing a second layer of oxidizable material on the partially etched first layer of oxidizable material.

9. The method of claim 8 wherein a roughness of the first layer of oxidizable material after depositing is less than a roughness of the second layer of oxidizable material after depositing.

10. The method of claim 8 wherein the forming the layer of oxidizable material comprises:

partially etching the second layer of oxidizable material to reduce a thickness of the second layer of oxidizable material.

11. The method of claim 1 wherein the substrate layer is part of a first wafer, wherein the method further comprises:

after the forming a layer of the first material over the oxide layer, attaching the first wafer to a second wafer, wherein the exposing is performed after the first wafer is attached to the second wafer and the first wafer is in an inverted position.

12. The method of claim 1 further comprising:

prior to the exposing, patterning the substrate layer to form a MEMS device structure, wherein after the exposing, the MEMS device structure is movable.

13. The method of claim 12 further comprising:

forming a partial opening in the oxide layer prior to forming the layer of a first material, wherein a thickness of the oxide layer is reduced at the partial opening, wherein the forming the layer of first material includes filling the partial opening with the first material, wherein the first material filled in the partial opening defines a travel stop in the cavity;

wherein the travel stop is positioned in the cavity to prevent the movable MEMS device structure from contacting an exposed surface of the layer of the first material immediately adjacent to the travel stop.

14. The method of claim 1 wherein the layer of the first material is characterized as polysilicon.

15. A method of forming an exposed surface for a MEMS device, the method comprising:

forming a layer of oxidizable material over a substrate layer;

oxidizing the layer of oxidizable material, wherein the oxidizing forms an oxide layer, the oxide layer has a top surface;

forming a layer of a first material over the oxide layer;

exposing at least a portion of the layer of the first material wherein the exposing includes removing at least a portion of the oxide layer;

wherein the MEMS device includes a cavity, wherein an exposed portion of the layer of first material defines a portion of the cavity, and

wherein the forming the layer of oxidizable material comprises depositing a first layer of oxidizable material, partially etching the first layer of oxidizable material to reduce a thickness of the first layer of oxidizable material, and depositing a second layer of oxidizable material on the partially etched first layer of oxidizable material.

16. The method of claim 15 wherein a roughness of the first layer of oxidizable material after depositing is less than a roughness of the second layer of oxidizable material after depositing.

17. The method of claim 15 wherein the forming the layer of oxidizable material comprises:

partially etching the second layer of oxidizable material to reduce a thickness of the second layer of oxidizable material.

18. The method of claim 15 further comprising:

forming a partial opening in the oxide layer prior to forming the layer of a first material, wherein a thickness of the oxide layer is reduced at the partial opening, wherein the forming the layer of the first material includes filling the partial opening with the first material, wherein the first material filled in the partial opening defines a travel stop in the cavity.

19. The method of claim 15 wherein the exposed portion of the layer of the first material has an average roughness (R a ) in a range of 5 nm to 50 nm.

20. The method of claim 15 wherein the substrate layer is part of a first wafer, wherein the method further comprises:

after the forming a layer of the first material over the oxide layer, attaching the first wafer to a second wafer, wherein the exposing is performed after the first wafer is attached to the second wafer and the first wafer is in an inverted position.

21. The method of claim 15 further comprising:

prior to the exposing, patterning the substrate layer to form a MEMS device structure, wherein after the exposing, the MEMS device structure is movable.

22. The method of claim 15 wherein the layer of the first material is characterized as polysilicon.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 19, 2026
From: NXP USA, INC.
To: STMICROELECTRONICS INTERNATIONAL N.V.
Reel/Frame 075126/0880 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE PREVIOUSLY RECORDED AT REEL: 040626 FRAME: 0683. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME EFFECTIVE NOVEMBER 7, 2016. Recorded Jan 12, 2017
From: NXP SEMICONDUCTORS USA, INC. (MERGED INTO); FREESCALE SEMICONDUCTOR, INC. (UNDER)
To: NXP USA, INC.
Reel/Frame 041414/0883 →
CHANGE OF NAME Recorded Nov 16, 2016
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 040626/0683 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 3, 2016
From: MONTEZ, RUBEN B.; SALIAN, ARVIND S.; STEIMLE, ROBERT F.
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 038441/0711 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 29, 2016
From: MONTEZ, RUBEN B.; SALIAN, ARVIND S.; STEIMLE, ROBERT F.
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 038420/0369 →
Continuity (1)
Related Publication 20170313573A1 · Nov 2, 2017