IP Library Granted Patent US 10,075,207
Granted Patent B2
US 10,075,207 · App. 15/144,193 · Granted Sep 11, 2018

GAAS/SIGE-BICMOS-based transceiver system-in-package for E-band frequency applications

Inventors: Andrea Betti-Berutto (Menlo Park, CA); Sushil Kumar (San Ramon, CA); Shawn Parker (Santa Clara, CA); Jonathan L. Kennedy (Grass Valley, CA); Christopher Saint (Colfax, CA); Michael Shaw (Granite Bay, CA); James Little (Sacramento, CA); Jeff Illgner (Grass Valley, CA)
Assignee: INTEGRATED DEVICE TECHNOLOGY, INC.
H04B1/40H01L23/66H01L25/16H03F3/1935H03F3/211H04B1/04H04B1/16H04W52/0209H01L27/0623H01L2223/6627H03F2200/294H03F2200/405H03F2200/451H04B2001/0416Y02D70/00
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Quick Facts
Patent No.
US 10,075,207
App. No.
15/144,193
Granted
Sep 11, 2018
Kind
B2
Abstract

An e-band transceiver includes a transmitter circuit and a receiver circuit. The transmitter circuit includes a surface mounted technology (SMT) module on which is mounted a silicon-germanium (SiGe) bipolar plus CMOS (BiCMOS) converter, a gallium arsenide (GaAs) pseudomorphic high-electron-mobility transistor (pHEMT) output amplifier coupled to the SiGe BiCMOS converter, and a microstrip/waveguide interface coupled to the GaAs pHEMT output amplifier. The receiver circuit of the e-band transceiver includes a receiver-side SMT module on which is mounted a receiver-side SiGe BiCMOS converter, a GaAs pHEMT low noise amplifier coupled to the receiver-side SiGe BiCMOS converter, and a receiver-side microstrip/waveguide interface coupled to the receiver-side GaAs pHEMT low noise amplifier.

Claims (16)

1. An e-band transceiver comprising a transmitter circuit and a receiver circuit, wherein the transmitter circuit comprises:

a surface mounted technology (SMT) module including:

a silicon-germanium (SiGe) bipolar plus CMOS (BiCMOS) converter, a gallium arsenide (GaAs) pseudomorphic high-electron-mobility transistor (pHEMT) output amplifier coupled to the SiGe BiCMOS converter, and a microstrip/waveguide interface coupled to the GaAs pHEMT output amplifier; and

a non-volatile memory configured to store calibration data, wherein said calibration data (i) allows a chip by chip calibration and (ii) avoids a calibration rejection procedure.

2. The e-band transceiver of claim 1 , wherein the SiGe BiCMOS converter further comprises a digital interface.

3. The e-band transceiver of claim 2 , wherein the digital interface is configured as a digital control interface for controlling one of bias, type of channel filters and output power levels of the SMT module.

4. The e-band transceiver of claim 3 , wherein the digital control interface is configured as one of an I 2 C or SPI interface.

5. The e-band transceiver of claim 2 , wherein the digital interface is coupled to a non-volatile memory.

6. The e-band transceiver of claim 1 , wherein the SMT module is a system-in-package chip.

7. The e-band transceiver of claim 1 , wherein the receiver circuit comprises:

a receiver-side SMT module including:

a receiver-side SiGe BiCMOS converter, a GaAs pHEMT low noise amplifier coupled to the receiver-side SiGe BiCMOS converter, and a receiver-side microstrip/waveguide interface coupled to the receiver-side GaAs pHEMT low noise amplifier.

8. The e-band transceiver according to claim 1 , wherein said calibration comprises accounting for mixer bias for full rejection of local oscillator leakage.

9. The e-band transceiver according to claim 1 , wherein said calibration is performed during a package production test phase.

10. The e-band transceiver according to claim 1 , wherein said calibration compensates for process variations of the GaAs output amplifier.

11. The apparatus according to claim 1 , wherein said amplifier is configured to provide higher power levels and higher linearity on a transmitter side.

Assignments (3)
RELEASE OF SECURITY INTEREST Recorded Mar 29, 2019
From: JPMORGAN CHASE BANK, N.A.
To: INTEGRATED DEVICE TECHNOLOGY, INC.; GIGPEAK, INC.; CHIPX, INCORPORATED; ENDWAVE CORPORATION; MAGNUM SEMICONDUCTOR, INC.
Reel/Frame 048746/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 21, 2017
From: BETTI-BERUTTO, ANDREA; KUMAR, SUSHIL; PARKER, SHAWN; KENNEDY, JONATHAN L.; SAINT, CHRISTOPHER; SHAW, MICHAEL; LITTLE, JAMES; ILLGNER, JEFF
To: INTEGRATED DEVICE TECHNOLOGY, INC.
Reel/Frame 044459/0820 →
SECURITY AGREEMENT Recorded Apr 5, 2017
From: INTEGRATED DEVICE TECHNOLOGY, INC.; GIGPEAK, INC.; MAGNUM SEMICONDUCTOR, INC.; ENDWAVE CORPORATION; CHIPX, INCORPORATED
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 042166/0431 →
Continuity (2)
Provisional Application 62154865 · Apr 30, 2015
Related Publication 20160323008A1 · Nov 3, 2016