IP Library Granted Patent US 9,843,745
Granted Patent B2
US 9,843,745 · App. 15/145,558 · Granted Dec 12, 2017

Image sensor pixels having separated charge storage regions

Inventor: Tomas Geurts (Haasrode, BE)
Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
H04N5/3532H04N5/3698H04N5/372
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Quick Facts
Patent No.
US 9,843,745
App. No.
15/145,558
Granted
Dec 12, 2017
Kind
B2
Abstract

An image sensor may include pixel having nested photosensitive regions. A pixel with nested photosensitive regions may include an inner photosensitive region that has a rectangular light collecting area. The inner photosensitive region may be formed in a substrate and may be surrounded by an outer photosensitive region. The pixel with nested photosensitive regions may include trunk circuitry and transistor circuitry. Trunk circuitry may include a voltage supply source, a charge storage node, and readout transistors. Trunk circuitry may be located in close proximity to both the inner and outer photosensitive regions. Transistor circuitry may couple the inner photosensitive region, the outer photosensitive region, and trunk circuitry to one another. Microlenses may be formed over the nested photosensitive groups. Hybrid color filters having a single color filter region over the inner photosensitive region and a portion of the outer photosensitive region may also be used.

Claims (45)

1. An image sensor pixel, comprising:

a first photosensitive region that stores a charge;

a second photosensitive region;

trunk circuitry that comprises a charge storage node, wherein the second photosensitive region is substantially surrounded by the trunk circuitry and the first photosensitive region; and

transistor circuitry that is configured to transfer the charge from the first photosensitive region to the storage node in the trunk circuitry through the second photosensitive region.

2. The image sensor pixel defined in claim 1 , wherein the transistor circuitry comprises a first transistor that is configured to transfer the charge from the first photosensitive region to the second photosensitive region and a second transistor that is configured to transfer the charge from the second photosensitive region to the storage node in the trunk circuitry.

3. The image sensor pixel defined in claim 2 , wherein the trunk circuitry further comprises:

a reset transistor that couples the charge storage node to a voltage supply having a supply voltage level; and

readout circuitry that reads out pixel image signals corresponding to from the charge storage node.

4. The image sensor pixel defined in claim 2 , further comprising:

a semiconductor substrate having opposing first and second surfaces, wherein the trunk circuitry and the first photosensitive region substantially surround the second photosensitive region at the first surface and wherein the first photosensitive region substantially surrounds the second photosensitive region at the second surface.

5. The image sensor pixel defined in claim 4 , further comprising:

an isolation region interposed between the first and second photosensitive regions that extends from the first surface to the second surface.

6. The image sensor pixel defined in claim 5 , wherein the isolation region is interposed between the first and second photosensitive regions at the first and second surfaces of the semiconductor substrate and is further interposed between the trunk circuitry and the second photosensitive region at the second surface of the semiconductor substrate.

7. The image sensor pixel defined in claim 6 , wherein, at the second surface, the isolation region has a first portion interposed between the trunk circuitry and a first side of the second photosensitive region, a second portion interposed between the first photosensitive region and a second side of the second photosensitive region, a third portion interposed between the first photosensitive region and a third side of the second photosensitive region, and a fourth portion interposed between the first photosensitive region and a fourth side of the second photosensitive region, and wherein the first side of the second photosensitive region opposes the third side of the second photosensitive region.

8. The image sensor pixel defined in claim 7 , wherein the second transistor bridges the first portion of the isolation region at the second surface and has a first terminal coupled to the trunk circuitry and a second terminal coupled to the first side of the second photosensitive region.

9. The image sensor pixel defined in claim 8 , wherein the first transistor bridges the fourth portion of the isolation region at the second surface, and wherein the first transistor has a first terminal coupled to the fourth side of the second photosensitive region and a second terminal coupled to the first photosensitive region.

10. The image sensor pixel defined in claim 8 , wherein the first transistor bridges the third portion of the isolation region at the second surface, and wherein the first transistor has a first terminal coupled to the third side of the second photosensitive region and a second terminal coupled to the first photosensitive region.

11. An image sensor pixel, comprising:

an outer photosensitive region;

an inner photosensitive region nested within the outer photosensitive region;

an isolation structure interposed between the inner and outer photosensitive regions; and

transistor circuitry formed over the isolation structure that has a first terminal coupled to the inner photosensitive region and a second terminal coupled to the outer photosensitive region.

12. The image sensor pixel defined in 11 , further comprising:

a voltage supply line that receives a supply voltage; and

an anti-blooming gate that couples the outer photosensitive region to the voltage supply line and that is configured to reset the outer photosensitive region to the supply voltage.

13. The image sensor pixel defined in 11 , further comprising:

a color filter formed over the outer photosensitive region and in the inner photosensitive region.

14. The image sensor pixel defined in 13 , wherein the color filter comprises:

a first filtering region formed over the inner photosensitive region; and

a second filtering region formed over the outer photosensitive region, wherein the first and second filtering regions transmit different respective spectrums of light.

15. The image sensor pixel defined in 14 , further comprising:

a microlens formed over the outer photosensitive region, wherein the outer photosensitive region has a higher sensitivity to light than the inner photosensitive region.

16. An image sensor, comprising:

a first image sensor pixel comprising:

a first photodiode that has a first charge storage capacity; and

a second photodiode that has a second charge storage capacity that is greater than the first charge storage capacity;

a second image sensor pixel that is adjacent to the first image sensor pixel and that comprises trunk circuitry; and

a transistor that couples the trunk circuitry in the second image sensor pixel to the second photodiode in the first image sensor pixel.

17. The image sensor defined in claim 16 , wherein the first photodiode is nested within the second photodiode.

18. The image sensor defined in claim 17 , wherein the second image sensor pixel comprises:

a third photodiode; and

a fourth photodiode nested within the third photodiode.

19. The image sensor defined in claim 18 , wherein the image sensor is configured operate the first and second image sensor pixels in a rolling shutter mode.

20. The image sensor defined in claim 18 , wherein the image sensor is configured to operate the first and second image sensor pixels in a global shutter mode.

Assignments (3)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 041187, FRAME 0295 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064151/0203 →
SECURITY INTEREST Recorded Dec 23, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH
Reel/Frame 041187/0295 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 3, 2016
From: GEURTS, TOMAS
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 038448/0490 →
Continuity (1)
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