IP Library Granted Patent US 9,691,653
Granted Patent B2
US 9,691,653 · App. 15/145,965 · Granted Jun 27, 2017

Method of forming a flexible semiconductor layer and devices on a flexible carrier

Inventors: Stephen W. Bedell (Wappingers Falls, NY); Devendra K. Sadana (Pleasantville, NY); Katherine L. Saenger (Ossining, NY); Abdelmajid Salhi (Riyadh, SA)
Assignee: International Business Machines Corporation
H01L21/76251H01L21/0276H01L21/2855H01L21/28568H01L21/308H01L21/32051H01L21/32139H01L21/4828H01L21/6835H01L21/76802H01L21/76877H01L21/76892H01L21/82H01L23/5286H01L29/045H01L23/53209H01L23/53214H01L23/53228H01L23/53242H01L23/53257H01L2221/68318H01L2221/68327H01L2221/68359H01L2221/68368H01L2221/68381
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Quick Facts
Patent No.
US 9,691,653
App. No.
15/145,965
Granted
Jun 27, 2017
Kind
B2
Abstract

A method for fabricating a semiconductor device comprises providing a preformed spalled structure comprising a stressor layer stack on a first surface of a semiconductor substrate; forming an interfacial release layer on an exposed second surface of the semiconductor substrate; adhesively bonding the interfacial release layer to a rigid handle substrate using an epoxy; removing at least a portion of the stressor layer stack from the first surface of the semiconductor substrate; processing the semiconductor substrate; and removing the semiconductor substrate from the interfacial release layer to impart flexibility to the semiconductor substrate.

Claims (49)

1. A method for fabricating a semiconductor device, comprising:

providing a structure comprising a stressor layer stack on a first surface of a semiconductor substrate;

separating the semiconductor substrate along a plane extending longitudinally through the semiconductor substrate parallel to the first surface of the semiconductor substrate to reduce a thickness of the semiconductor substrate and expose a second surface of the semiconductor substrate;

forming an interfacial release layer on the exposed second surface of the semiconductor substrate;

adhesively bonding the interfacial release layer to a rigid handle substrate using an epoxy;

removing at least a portion of the stressor layer stack from the first surface of the semiconductor substrate;

processing the semiconductor substrate; and

removing the semiconductor substrate from the interfacial release layer to impart flexibility to the semiconductor substrate;

wherein providing a structure comprising a stressor layer stack comprises forming the stressor layer stack by

depositing an adhesion layer on the semiconductor substrate,

depositing a seed layer on the adhesion layer,

depositing a stressor layer on the seed layer, and

applying a releasable tape to the stressor layer; and

wherein depositing an adhesion layer on the semiconductor substrate comprises depositing titanium on the semiconductor substrate.

2. The method of claim 1 , wherein depositing a seed layer on the adhesion layer comprises depositing nickel on the adhesion layer.

3. The method of claim 1 , wherein depositing a stressor layer on the seed layer comprises depositing nickel on the seed layer.

4. The method of claim 1 , wherein forming an interfacial release layer on the exposed second surface of the semiconductor substrate comprises thermally evaporating an aluminum-containing compound on the semiconductor substrate.

5. The method of claim 4 , further comprising introducing a contaminant to a surface of the semiconductor substrate prior to thermally evaporating an aluminum-containing compound on the semiconductor substrate.

6. The method of claim 1 , wherein removing the semiconductor substrate from the interfacial release layer comprises separating the semiconductor substrate from the interfacial release layer using a pressure-sensitive carrier tape.

7. The method of claim 1 , wherein processing the semiconductor substrate comprises one or more of patterning the semiconductor substrate, thermally treating the semiconductor substrate, thinning the semiconductor substrate, and depositing a film on the semiconductor substrate.

8. The method of claim 1 , further comprising isolating cells in the semiconductor substrate.

9. The method of claim 8 , wherein isolating cells in the semiconductor substrate comprises applying a hardmask to the semiconductor substrate and etching exposed semiconductor substrate down to the epoxy.

10. The method of claim 9 , further comprising applying a pressure-sensitive tape to the hardmask to remove the semiconductor substrate from the interfacial release layer.

11. The method of claim 9 , wherein isolating cells in the semiconductor substrate comprises laser scribing exposed semiconductor substrate.

12. The method of claim 1 , wherein separating the semiconductor substrate along a plane extending longitudinally through the semiconductor substrate comprises mechanically guiding the releasable tape applied to the stressor layer to induce and sustain a spalling mode fracture.

13. The method of claim 1 , wherein adhesively bonding the interfacial release layer to a rigid handle substrate using an epoxy comprises using pressure to substantially uniformly distribute the epoxy on at least a portion of the handle substrate to facilitate a substantially bubble-free bond between the handle substrate and the semiconductor substrate.

14. The method of claim 1 , wherein the semiconductor substrate comprises 100-oriented silicon material.

15. The method of claim 1 , wherein the semiconductor substrate is a material selected from the group consisting of silicon, germanium, SiGe, bulk III-V materials, any of the foregoing materials further including epitaxially grown semiconductor layers, any of the foregoing materials further including doped layers, metallic layers, and/or passivating layers, and combinations of the foregoing materials.

16. The method of claim 1 , wherein the semiconductor substrate comprises a silicon or silicon-containing semiconductor material and the interfacial release layer comprises aluminum.

17. The method of claim 1 , wherein the releasable tape applied to the stressor layer is a UV releasable tape.

18. A method for fabricating a semiconductor device, comprising:

providing a structure comprising a stressor layer stack on a first surface of a semiconductor substrate;

separating the semiconductor substrate along a plane extending longitudinally through the semiconductor substrate parallel to the first surface of the semiconductor substrate to reduce a thickness of the semiconductor substrate and expose a second surface of the semiconductor substrate;

forming an interfacial release layer on the exposed second surface of the semiconductor substrate;

adhesively bonding the interfacial release layer to a rigid handle substrate using an epoxy;

removing at least a portion of the stressor layer stack from the first surface of the semiconductor substrate;

processing the semiconductor substrate; and

removing the semiconductor substrate from the interfacial release layer to impart flexibility to the semiconductor substrate;

wherein forming an interfacial release layer on the exposed second surface of the semiconductor substrate comprises thermally evaporating an aluminum-containing compound on the semiconductor substrate.

19. The method of claim 18 , further comprising introducing a contaminant to a surface of the semiconductor substrate prior to thermally evaporating an aluminum-containing compound on the semiconductor substrate.

20. A method for fabricating a semiconductor device, comprising:

providing a structure comprising a stressor layer stack on a first surface of a semiconductor substrate;

separating the semiconductor substrate along a plane extending longitudinally through the semiconductor substrate parallel to the first surface of the semiconductor substrate to reduce a thickness of the semiconductor substrate and expose a second surface of the semiconductor substrate;

forming an interfacial release layer on the exposed second surface of the semiconductor substrate;

adhesively bonding the interfacial release layer to a rigid handle substrate using an epoxy;

removing at least a portion of the stressor layer stack from the first surface of the semiconductor substrate;

processing the semiconductor substrate;

removing the semiconductor substrate from the interfacial release layer to impart flexibility to the semiconductor substrate; and

isolating cells in the semiconductor substrate.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 11, 2020
From: INTERNATIONAL BUSINESS MACHINES CORPORATION
To: ELPIS TECHNOLOGIES INC.
Reel/Frame 052620/0961 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 4, 2016
From: BEDELL, STEPHEN W.; SADANA, DEVENDRA K.; SAENGER, KATHERINE L.; SALHI, ABDELMAJID
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 038453/0369 →
Continuity (2)
Division 14795019 · Jul 9, 2015
Related Publication 20170011953A1 · Jan 12, 2017