Capacitive coupled input transfer gates
View Patent ↗According to one embodiment, an apparatus is for use with a remote circuit. The apparatus has a first input for receiving an input voltage, a second input for receiving a power supply voltage, and a third input for receiving an input clock having a high state corresponding to the power supply voltage and a low state corresponding to a return for the power supply voltage. The apparatus includes a first shift circuit coupled to the first input and the third input, and configured to output a first output clock, the first output clock having a low state corresponding to the input voltage. The apparatus further includes a second shift circuit coupled to the first input and the first shift circuit, and configured to output a second output clock, the second output clock having a high state corresponding to the input voltage.
1. An apparatus, for use with a remote circuit, having a first input for receiving an input voltage, a second input for receiving a power supply voltage, and a third input for receiving an input clock having a high state corresponding to the power supply voltage and a low state corresponding to a return for the power supply voltage, the apparatus comprising:
a first shift circuit coupled to the first input and the third input, and configured to output a first output clock, the first output clock having a low state corresponding to the input voltage; and
a second shift circuit coupled to the first input and the first shift circuit, and configured to output a second output clock, the second output clock having a high state corresponding to the input voltage.
2. The apparatus of claim 1 , wherein the first shift circuit comprises:
a capacitor; and
a diode coupled between the first input and a terminal of the capacitor.
3. The apparatus of claim 2 , wherein:
an anode of the diode is coupled to the first input; and
a cathode of the diode is coupled to the terminal of the capacitor.
4. The apparatus of claim 2 , wherein the diode is a Schottky diode.
5. The apparatus of claim 2 , further comprising a refresh circuit configured to charge or discharge the capacitor during a change in the input voltage.
6. The apparatus of claim 5 , wherein the refresh circuit is further configured to direct charge from the terminal of the capacitor to the return for the power supply voltage.
7. The apparatus of claim 5 , wherein the refresh circuit is further configured to direct charge from the terminal of the capacitor to the output of the second shift circuit.
8. The apparatus of claim 1 , wherein the second shift circuit comprises:
a capacitor; and
a diode coupled between the first input and a terminal of the capacitor.
9. The apparatus of claim 8 , wherein:
an anode of the diode is coupled to the first terminal of the capacitor; and
a cathode of the diode is coupled to the first input.
10. The apparatus of claim 9 , wherein:
the first shift circuit comprises:
a second capacitor; and
a second diode coupled between the first input and a terminal of the second capacitor;
an anode of the second diode is coupled to the first input; and
a cathode of the second diode is coupled to the terminal of the second capacitor.
11. The apparatus of claim 8 , wherein the diode is a Schottky diode.
12. The apparatus of claim 1 , wherein a frequency of the first output clock and a frequency of the second output clock are approximately equal to a frequency of the input clock.
13. The apparatus of claim 1 , wherein a rise time of the first output clock and a rise time of the second output clock are approximately equal to a rise time of the input clock.
14. The apparatus of claim 1 , wherein the first output clock has a high state corresponding approximately to a sum of the input voltage and the power supply voltage.
15. The apparatus of claim 1 , wherein the second output clock has a low state corresponding approximately to a difference between the power supply voltage and the input voltage.
16. The apparatus of claim 1 , wherein the remote circuit comprises at least an auto-zero circuit or a chopper circuit.
17. A method comprising:
receiving, at a first input, an input voltage;
receiving, at a second input, a power supply voltage;
receiving, at a third input, an input clock having a high state corresponding to the power supply voltage and a low state corresponding to a return for the power supply voltage;
outputting, at a first shift circuit coupled to the first input and the third input, a first output clock having a low state corresponding to the input voltage; and
outputting, at a second shift circuit coupled to the first input and the first shift circuit, a second output clock having a high state corresponding to the input voltage.
18. The method of claim 17 , wherein a frequency of the first output clock and a frequency of the second output clock are approximately equal to a frequency of the input clock.
19. The method of claim 17 , wherein a rise time of the first output clock and a rise time of the second output clock are approximately equal to a rise time of the input clock.
20. The method of claim 17 , wherein at least:
the first output clock has a high state corresponding approximately to a sum of the input voltage and the power supply voltage; or
the second output clock has a low state corresponding approximately to a difference between the power supply voltage and the input voltage.