IP Library Granted Patent US 10,600,724
Granted Patent B2
US 10,600,724 · App. 15/151,177 · Granted Mar 24, 2020

Leadframe with vertically spaced die attach pads

Inventors: Chia-Yu Chang (Taipei Hsien, TW); Chih-Chien Ho (Taipei Hsien, TW); Steven Su (Tainan, TW)
Assignee: TEXAS INSTRUMENTS INCORPORATED
H01L23/49503G06F17/5077H01L23/49541H01L23/49548H01L23/49551H01L24/00H01L23/3107H01L2224/48091H01L2224/48137H01L2224/48247H01L2224/73265H01L2225/06506H01L2225/06527H01L2225/06555H01L2225/06582H01L2225/06593H01L2924/181
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Quick Facts
Patent No.
US 10,600,724
App. No.
15/151,177
Granted
Mar 24, 2020
Kind
B2
Abstract

A leadframe includes a first die attach pad (“DAP”) having a first longitudinally extending edge surface and a second DAP having a first longitudinally extending edge surface. The second DAP is positioned with the first longitudinally extending edge surface thereof in adjacent, laterally and vertically spaced relationship with the first longitudinally extending edge surface of the first DAP.

Claims (38)

1. A method of making a packaged integrated circuit device, comprising:

providing a lead frame with a first die attach pad and a second die attach pad, each die attach pad having a top surface, a bottom surface and an edge surface extending between the top surface and the bottom surface, the top surfaces of the first die attach pad and the second die attach pad being positioned at the same elevation, the edge surfaces of the first die attach pad and the second die attach pad being parallel and separated by a gap having a gap distance, at least one of the parallel edge surfaces being nonplanar between the top and bottom surfaces;

attaching a first component to the first die attach pad;

attaching a second component to the second die attach pad; and

encapsulating the lead frame, first component and second component with a layer of mold compound.

2. The method of claim 1 , wherein both of the parallel edge surfaces between the top and bottom surfaces are nonplanar.

3. The method of claim 1 , wherein the first component is a semiconductor die.

4. The method of claim 1 , wherein the second component is a semiconductor die.

5. The method of claim 1 , wherein the first and second components are semiconductor dies.

6. The method of claim 1 , wherein bond wires connect the first component to the lead frame.

7. The method of claim 1 , wherein bond wires connect the second component to the lead frame.

8. The method of claim 1 , wherein bond wires connect the first component and the second component to the lead frame.

9. The method of claim 1 , wherein bond wires connect the first component to the second component.

10. A method of making a packaged integrated circuit device, comprising:

providing a lead frame with a first die attach pad and a second die attach pad, each die attach pad having a top surface, a bottom surface and an edge surface extending between the top surface and the bottom surface, the top surfaces of the first die attach pad and the second die attach pad being positioned at the same elevation, the edge surfaces of the first die attach pad and the second die attach pad being parallel and separated by a gap having a nap distance, wherein both of the parallel edge surfaces are rounded;

attaching a first component to the first die attach pad;

attaching a second component to the second die attach pad; and

encapsulating the lead frame, first component and second component with a layer of mold compound.

11. A method of making a packaged integrated circuit device, comprising:

providing a lead frame with a first die attach pad and a second die attach pad, each die attach pad having a top surface, a bottom surface and an edge surface extending between the top surface and the bottom surface, the top surfaces of the first die attach pad and the second die attach pad being positioned at different elevations, the edge surfaces of the first die attach pad and the second die attach pad being parallel and separated by a gap having a gap distance, at least one of the parallel edge surfaces being nonplanar between the top and bottom surfaces;

attaching a first component to the first die attach pad;

attaching a second component to the second die attach pad; and

encapsulating the lead frame, first component and second component with a layer of mold compound.

12. The method of claim 1 , wherein at least one of the parallel edge surfaces is a vertical edge surface.

13. The method of claim 1 , wherein both of the parallel edge surfaces between the top and bottom surfaces are nonplanar.

14. The method of claim 11 , wherein the first component is a semiconductor die.

15. The method of claim 11 , wherein the second component is a semiconductor die.

16. The method of claim 11 , wherein the first and second components are semiconductor dies.

17. The method of claim 11 , wherein bond wires connect the first component to the lead frame.

18. The method of claim 11 , wherein bond wires connect the second component to the lead frame.

19. The method of claim 11 , wherein bond wires connect the first component and the second component to the lead frame.

20. The method of claim 11 , wherein bond wires connect the first component to the second component.

21. The method of claim 11 , wherein one of the different elevations is a same elevation as the lead frame.

22. A method of making a packaged integrated circuit device, comprising:

providing a lead frame with a first die attach pad and a second die attach pad, each die attach pad having a top surface, a bottom surface and an edge surface extending between the top surface and the bottom surface, the top surfaces of the first die attach pad and the second die attach pad being positioned at different elevations, the edge surfaces of the first die attach pad and the second die attach pad being parallel and separated by a gap having a nap distance, wherein both of the parallel edge surfaces are rounded;

attaching a first component to the first die attach pad;

attaching a second component to the second die attach pad; and

encapsulating the lead frame, first component and second component with a layer of mold compound.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 17, 2016
From: CHANG, CHIA-YU; HO, CHIH-CHIEN; SU, STEVEN
To: TEXAS INSTRUMENTS INCORPORATED
Reel/Frame 038621/0495 →
Continuity (1)
Related Publication 20170330822A1 · Nov 16, 2017