Multilayer dielectric structures with graded composition for nano-scale semiconductor devices
Multilayer dielectric structures are provided with graded composition. For example, a multilayer dielectric structure includes a stack of dielectric films, wherein the dielectric films include at least a first SiCNO (silicon carbon nitride oxide) film and a second SiCNO film. The first SiCNO film has a first composition profile of C, N, and O atoms. The second SiCNO film has a second composition profile of C, N, and O atoms, which is different from the first composition profile of C, N, and O atoms. The composition profiles of C, N and/or O atoms of the constituent dielectric films of the multilayer dielectric structure are customized to enhance or otherwise optimize one or more electrical and/or physical properties of the multilayer dielectric structure.
1. A method for fabricating a multilayer dielectric structure, comprising:
depositing a first SiCN (silicon carbon nitride) film;
performing an in-situ plasma treatment process on the first SiCN film to convert the first SiCN film to a first SiCNO (silicon carbon nitride oxide) film having a first composition profile of C, N, and O atoms;
depositing a second SiCN film; and
performing an in-situ plasma treatment process on the second SiCN film to convert the second SiCN film to a second SiCNO film having a second composition profile of C, N, and O atoms;
wherein the first and second composition profiles are different; and
wherein a total thickness of the multilayer dielectric structure is about 10 nanometers or less.
2. The method of claim 1 , wherein an atomic percentage of O atoms in the first SiCNO film is in a range of about 0% to about 25%, and wherein an atomic percentage of O atoms in the second SiCNO film is in a range of about 5% to about 35%.
3. The method of claim 1 , wherein an atomic percentage of C atoms in the first SiCNO film is in a range of about 10% to about 40%, and wherein an atomic percentage of C atoms in the second SiCNO film is in a range of about 0% to about 30%.
4. The method of claim 1 , wherein an atomic percentage of N atoms in the first and second SiCNO films differs in a range of about 2% to about 20%.
5. The method of claim 1 , wherein the multilayer dielectric structure consists only of SiCNO films.
6. The method of claim 1 , further comprising forming at least one or more of a SiN film, a SiNO film, a SiCO film, a SiCN film, or a combination thereof, as part of the multilayer dielectric structure.
7. The method of claim 1 , wherein each dielectric film is formed to have a thickness in a range of about 1.0 nanometer to about 5 nanometers.
8. The method of claim 1 , comprising engineering the first and second composition profiles to fabricate a multilayer dielectric structure having an effective dielectric constant of about 5.5 or less.
9. The method of claim 1 , comprising engineering the first and second composition profiles to fabricate a multilayer dielectric structure having a target adhesion property.
10. The method of claim 1 , comprising engineering the first and second composition profiles to fabricate a multilayer dielectric structure having a target current leakage property.
11. The method of claim 1 , comprising engineering the first and second composition profiles to fabricate a multilayer dielectric structure having a target etch resistance property.
12. The method of claim 1 , comprising engineering the first and second composition profiles to fabricate a multilayer dielectric structure having a target diffusion barrier property.
13. The method of claim 1 , comprising engineering the first and second composition profiles to fabricate a multilayer dielectric structure having a target hydrophobic property.
14. The method of claim 1 , comprising fabricating the multilayer dielectric structure as a spacer formed on a sidewall of a gate structure of a transistor device.
15. The method of claim 1 , comprising fabricating the multilayer dielectric structure as a stress liner layer that is conformally formed over a transistor device to impart a tensile or compressive stress.
16. The method of claim 1 , comprising fabricating the multilayer dielectric structure as a conformal liner layer or a conformal barrier layer on a sidewall and bottom surface of an etched trench of a trench isolation structure.
17. The method of claim 1 , comprising fabricating the multilayer dielectric structure as a conformal liner layer or a conformal barrier layer of a through-silicon via (TSV) structure.
18. A method for fabricating a multilayer dielectric structure, comprising:
depositing a first SiCN (silicon carbon nitride) film;
performing an in-situ plasma treatment process on the first SiCN film to convert the first SiCN film to a first SiCNO (silicon carbon nitride oxide) film having a first composition profile of C, N, and O atoms;
depositing a second SiCN film;
performing an in-situ plasma treatment process on the second SiCN film to convert the second SiCN film to a second SiCNO film having a second composition profile of C, N, and O atoms;
wherein the first and second composition profiles are different; and
engineering the first and second composition profiles to fabricate a multilayer dielectric structure having a target breakdown voltage.
19. A method for fabricating a multilayer dielectric structure, comprising:
depositing a first SiCN (silicon carbon nitride) film;
performing an in-situ plasma treatment process on the first SiCN film to convert the first SiCN film to a first SiCNO (silicon carbon nitride oxide) film having a first composition profile of C, N, and O atoms;
depositing a second SiCN film;
performing an in-situ plasma treatment process on the second SiCN film to convert the second SiCN film to a second SiCNO film having a second composition profile of C, N, and O atoms;
wherein the first and second composition profiles are different; and
fabricating the multilayer dielectric structure as a capping layer that is disposed between an ILD (inter-level dielectric) layer and a copper damascene wire of a BEOL (back-end-of line) structure.