IP Library › Granted Patent US 9,911,844
Granted Patent B2
US 9,911,844 · App. 15/155,885 · Granted Mar 6, 2018

Semiconductor device

Inventors: Yuki Nakano (Kyoto, JP); Ryota Nakamura (Kyoto, JP); Hiroyuki Sakairi (Kyoto, JP)
Assignee: ROHM CO., LTD.
H01L29/7805H01L29/0649H01L29/0653H01L29/0847H01L29/1095H01L29/1608H01L29/41766H01L29/45H01L29/47H01L29/66068H01L29/7806H01L29/7813
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Quick Facts
Patent No.
US 9,911,844
App. No.
15/155,885
Granted
Mar 6, 2018
Kind
B2
Abstract

The semiconductor device includes: a semiconductor layer in which a trench is formed having a side surface and a bottom surface; a second conductivity-type layer formed on the semiconductor layer on the side surface and the bottom surface of the trench; a first conductivity-type layer formed on the semiconductor layer so as to contact the second conductivity-type layer; a first electrode electrically connected to the first conductivity-type layer; a second electrode embedded in the trench and electrically connected to the second conductivity-type layer; and a barrier-forming layer which is arranged between the second electrode and the side surface of the trench and which, between said barrier-forming layer and the second conductivity-type layer, forms a potential barrier higher than the potential barrier between the second conductivity-type layer and the second electrode.

Claims (22)

1. A semiconductor device comprising:

a semiconductor layer in which a trench having a side surface and a bottom surface is formed;

a second conductivity type layer formed in the semiconductor layer on the side surface and the bottom surface of the trench;

a first conductivity type layer formed in the semiconductor layer so as to be contiguous to the second conductivity type layer;

a first electrode electrically connected to the first conductivity type layer;

a second electrode that is embedded in the trench and that is electrically connected to the second conductivity type layer; and

a barrier-forming layer that is disposed between the side surface of the trench and the second electrode and that forms a potential barrier between the barrier-forming layer and the second conductivity type layer higher than a potential barrier between the second conductivity type layer and the second electrode.

2. The semiconductor device according to claim 1 , wherein the barrier-forming layer is further disposed on an edge portion of the bottom surface of the trench.

3. The semiconductor device according to claim 1 , wherein the barrier-forming layer includes a metal layer made of any one of tungsten (W), platinum (Pt), nickel (Ni), cobalt (Co), and molybdenum (Mo).

4. The semiconductor device according to claim 1 , wherein the barrier-forming layer includes a first conductivity type polysilicon layer.

5. The semiconductor device according to claim 1 , wherein the barrier-forming layer includes an insulating layer made of any one of non-doped polysilicon, silicon oxide (SiO 2 ), aluminum oxide (Al 2 O 3 ), and aluminum oxynitride (AlON).

6. A semiconductor device comprising:

a semiconductor layer in which a taper trench having a side surface and a bottom surface is formed, the side surface being inclined with respect to the bottom surface at an obtuse angle;

a second conductivity type layer formed in the semiconductor layer on the side surface and the bottom surface of the taper trench, the second conductivity type layer becoming thicker in a lateral direction along a surface of the semiconductor layer from the side surface corresponding to an inclination of the side surface of the taper trench;

a first conductivity type layer formed in the semiconductor layer so as to be contiguous to the second conductivity type layer;

a first electrode electrically connected to the first conductivity type layer;

a second electrode that is embedded in the taper trench and that is electrically connected to the second conductivity type layer; and

a barrier-forming layer disposed between the side surface of the taper trench and the second electrode and forming a potential barrier between the barrier-forming layer and the second conductivity type layer higher than a potential barrier between the second conductivity type layer and the second electrode.

7. The semiconductor device according to claim 6 , wherein the barrier-forming layer is further disposed on an edge portion of the bottom surface of the taper trench.

8. The semiconductor device according to claim 6 , wherein the barrier-forming layer includes a metal layer made of any one of tungsten (W), platinum (Pt), nickel (Ni), cobalt (Co), and molybdenum (Mo).

9. The semiconductor device according to claim 6 , wherein the barrier-forming layer includes a first conductivity type polysilicon layer.

10. The semiconductor device according to claim 6 , wherein the barrier-forming layer includes an insulating layer made of any one of non-doped polysilicon, silicon oxide (SiO 2 ), aluminum oxide (Al 2 O 3 ), and aluminum oxynitride (AlON).

Priority Claims (1)
JP 2012-181897 · Aug 20, 2012 · national
Continuity (2)
Division 14423034
Related Publication 20160260830A1 · Sep 8, 2016