IP Library Granted Patent US 9,887,166
Granted Patent B2
US 9,887,166 · App. 15/165,837 · Granted Feb 6, 2018

Integrated circuit assemblies with reinforcement frames, and methods of manufacture

Inventors: Rajesh Katkar (San Jose, CA); Laura Wills Mirkarimi (Sunol, CA); Arkalgud R. Sitaram (Cupertino, CA); Charles G. Woychik (San Jose, CA)
Assignee: Invensas Corporation
H01L23/562H01L21/561H01L21/78H01L22/32H01L23/10H01L23/147H01L23/3121H01L23/3135H01L23/367H01L23/3675H01L23/49827H01L24/09H01L24/94H01L24/97H01L25/0652H01L25/0655H01L25/0657H01L25/50H01L21/784H01L23/04H01L23/49838H01L24/05H01L24/06H01L24/13H01L24/14H01L24/16H01L24/17H01L24/32H01L24/73H01L24/83H01L24/92H01L25/18H01L2224/0401H01L2224/05568H01L2224/05569H01L2224/0603H01L2224/06181H01L2224/131H01L2224/1403H01L2224/14181H01L2224/16145H01L2224/16225H01L2224/16238H01L2224/17181H01L2224/32145H01L2224/32225H01L2224/32245H01L2224/73204H01L2224/73253H01L2224/83192H01L2224/92125H01L2224/92225H01L2224/94H01L2224/97H01L2225/06513H01L2225/06517H01L2225/06541H01L2225/06548H01L2225/06586H01L2225/06589H01L2225/06596H01L2924/12042H01L2924/15192H01L2924/15311H01L2924/164H01L2924/167H01L2924/1615H01L2924/1632H01L2924/1679H01L2924/16152H01L2924/16153H01L2924/16176H01L2924/16235H01L2924/16251H01L2924/16788H01L2924/181H01L2924/351H01L2924/3511
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Quick Facts
Patent No.
US 9,887,166
App. No.
15/165,837
Filed
May 26, 2016
Granted
Feb 6, 2018
Kind
B2
Art Unit
2896
USPC
257/48
Abstract

An assembly with modules ( 110, 1310 ) containing integrated circuits and attached to a wiring substrate ( 120 ) is reinforced by one or more reinforcement frames ( 410 ) attached to the wiring substrate. The modules are located in openings (e.g. cavities and/or through-holes 414 ) in the reinforcement frame. Other features are also provided.

Claims (38)

1. An assembly comprising:

an interposer comprising a silicon substrate, the interposer comprising one or more first contact pads;

a plurality of modules attached to the interposer, each module comprising a semiconductor integrated circuit, each module comprising one or more contact pads each of which is attached to a respective first contact pad;

a reinforcement frame comprising a silicon substrate comprising one or more cavities, the reinforcement frame being attached to the interposer, wherein at least part of each module is located in a corresponding cavity in the silicon substrate of the reinforcement frame, wherein for each module the corresponding cavity has a cavity surface overlying the module;

wherein the plurality of modules comprises a first module and a second module, and the cavity surface overlying the first module is deeper than the cavity surface overlying the second module;

wherein in operation of the assembly, the second module is to generate less heat than the first module.

2. The assembly of claim 1 wherein the cavity surfaces overlying the first and second modules are in the same cavity.

3. The assembly of claim 1 wherein the cavity surfaces overlying the first and second modules are in respective different cavities.

4. The assembly of claim 1 wherein the first and second modules have different heights.

5. The assembly of claim 1 wherein the first module is taller than the second module.

6. The assembly of claim 1 wherein the first and second modules have the same heights.

7. The assembly of claim 1 wherein the first and second modules are separated from the respective overlying cavity surfaces by gaps, and the gaps are the same.

8. The assembly of claim 1 wherein the first and second modules are separated from the respective overlying cavity surface by gaps, and the gaps have the same thermal resistance.

9. An assembly comprising:

an interposer comprising a silicon substrate, the interposer comprising one or more first contact pads;

a plurality of modules attached to the interposer, each module comprising a semiconductor integrated circuit, each module comprising one or more contact pads each of which is attached to a respective first contact pad;

a reinforcement frame comprising a silicon substrate comprising one or more cavities, the reinforcement frame being attached to the interposer, wherein at least part of each module is located in a corresponding cavity in the silicon substrate of the reinforcement frame, wherein for each module the corresponding cavity has a cavity surface overlying the module;

wherein the plurality of modules comprises a first module and a second module, and the cavity surface overlying the first module is deeper than the cavity surface overlying the second module;

wherein the reinforcement frame comprises circuitry connected to contact pads located at tops of the first and second modules.

10. The assembly of claim 1 wherein the reinforcement frame is directly bonded to the interposer.

11. A manufacturing method comprising:

obtaining an interposer comprising a silicon substrate, the interposer comprising one or more first contact pads;

attaching a plurality of modules to the interposer, each module comprising a semiconductor integrated circuit, each module comprising one or more contact pads each of which is attached to a respective first contact pad;

attaching, to the interposer, a reinforcement frame comprising a silicon substrate comprising one or more cavities, wherein the reinforcement frame is attached to the interposer so that at least part of each module is located in a corresponding cavity in the silicon substrate of the reinforcement frame, wherein for each module the corresponding cavity has a cavity surface overlying the module;

wherein the plurality of modules comprises a first module and a second module, and the cavity surface overlying the first module is deeper than the cavity surface overlying the second module;

wherein in operation of the assembly, the second module is to generate less heat than the first module.

12. The method of claim 11 wherein the reinforcement frame is attached to the interposer so that the cavity surfaces overlying the first and second modules are in the same cavity.

13. The method of claim 11 wherein the reinforcement frame is attached to the interposer so that the cavity surfaces overlying the first and second modules are in respective different cavities.

14. The method of claim 11 wherein the first module is taller than the second module.

15. The method of claim 11 further comprising, after attaching the first and second modules to the interposer but before attaching the reinforcement frame to the interposer, polishing a top surface of at least one module to improve uniformity of the module heights.

16. The method of claim 11 wherein the reinforcement frame is attached to the interposer so that the first and second modules are separated from the respective overlying cavity surfaces by gaps, and the gaps are the same.

17. The method of claim 11 wherein after said attaching the reinforcement frame to the interposer, the first and second modules are separated from the respective overlying cavity surface by gaps, and the gaps have the same thermal resistance.

18. A manufacturing method comprising:

obtaining an interposer comprising a silicon substrate, the interposer comprising one or more first contact pads;

attaching a plurality of modules to the interposer, each module comprising a semiconductor integrated circuit, each module comprising one or more contact pads each of which is attached to a respective first contact pad;

attaching, to the interposer, a reinforcement frame comprising a silicon substrate comprising one or more cavities, wherein the reinforcement frame is attached to the interposer so that at least part of each module is located in a corresponding cavity in the silicon substrate of the reinforcement frame, wherein for each module the corresponding cavity has a cavity surface overlying the module;

wherein the plurality of modules comprises a first module and a second module, and the cavity surface overlying the first module is deeper than the cavity surface overlying the second module;

wherein the reinforcement frame comprises circuitry, and after said attaching the reinforcement frame to the interposer the circuitry is connected to contact pads located at tops of the first and second modules.

Assignments (6)
CHANGE OF NAME Recorded Nov 24, 2025
From: INVENSAS CORPORATION
To: INVENSAS LLC
Reel/Frame 073508/0668 →
CHANGE OF NAME Recorded Nov 24, 2025
From: INVENSAS LLC
To: ADEIA SEMICONDUCTOR TECHNOLOGIES LLC
Reel/Frame 073508/0751 →
RELEASE OF SECURITY INTEREST Recorded Jun 11, 2020
From: ROYAL BANK OF CANADA
To: TESSERA, INC.; INVENSAS BONDING TECHNOLOGIES, INC. (F/K/A ZIPTRONIX, INC.); FOTONATION CORPORATION (F/K/A DIGITALOPTICS CORPORATION AND F/K/A DIGITALOPTICS CORPORATION MEMS); INVENSAS CORPORATION; TESSERA ADVANCED TECHNOLOGIES, INC; DTS, INC.; DTS LLC; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
Reel/Frame 052920/0001 →
SECURITY INTEREST Recorded Jun 1, 2020
From: ROVI SOLUTIONS CORPORATION; ROVI TECHNOLOGIES CORPORATION; ROVI GUIDES, INC.; TIVO SOLUTIONS INC.; VEVEO, INC.; INVENSAS CORPORATION; INVENSAS BONDING TECHNOLOGIES, INC.; TESSERA, INC.; TESSERA ADVANCED TECHNOLOGIES, INC.; DTS, INC.; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
To: BANK OF AMERICA, N.A.
Reel/Frame 053468/0001 →
SECURITY INTEREST Recorded Dec 2, 2016
From: INVENSAS CORPORATION; TESSERA, INC.; TESSERA ADVANCED TECHNOLOGIES, INC.; ZIPTRONIX, INC.; DIGITALOPTICS CORPORATION; DIGITALOPTICS CORPORATION MEMS; DTS, LLC; DTS, INC.; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
To: ROYAL BANK OF CANADA, AS COLLATERAL AGENT
Reel/Frame 040797/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 27, 2016
From: KATKAR, RAJESH; MIRKARIMI, LAURA WILLS; SITARAM, ARKALGUD R.; WOYCHIK, CHARLES G.
To: INVENSAS CORPORATION
Reel/Frame 038735/0011 →
Continuity (4)
Continuation 14288064 · May 27, 2014
Continuation In Part 14214365 · Mar 14, 2014
Provisional Application 61952066 · Mar 12, 2014
Related Publication 20160276294A1 · Sep 22, 2016