Method of mechanical separation for a double layer transfer
The present disclosure relates to a method for mechanically separating layers, in particular in a double layer transfer process. The present disclosure relates more in particular to a method for mechanically separating layers, comprising the steps of providing a semiconductor compound comprising a layer of a handle substrate and an active layer with a front main side and a back main side opposite the front main side, wherein the layer of the handle substrate is attached to the front main side of the active layer, then providing a layer of a carrier substrate onto the back main side of the active layer, and then initiating mechanical separation of the layer of the handle substrate, wherein the layer of the handle substrate and the layer of the carrier substrate are provided with a substantially symmetrical mechanical structure.
1. A method for mechanically separating layers, comprising the steps of:
providing a first semiconductor compound comprising a layer of a handle substrate and an active layer with a front main side and a back main side opposite the front main side, wherein the layer of the handle substrate is attached to the front main side of the active layer; then
providing a layer of a carrier substrate onto the back main side of the active layer; and then
initiating mechanical separation of the layer of the handle substrate so as to obtain a second semiconductor compound comprising the layer of the carrier substrate at the back main side of the active layer;
and further comprising, before the step of initiating mechanical separation, a step of thinning the layer of the handle substrate;
wherein the layer of the handle substrate and the layer of the carrier substrate are provided with a substantially symmetrical mechanical structure after the step of thinning the layer of the handle substrate.
2. The method of claim 1 , wherein the layer of the carrier substrate and/or the layer of the handle substrate are chosen such that their Et 3 products are similar.
3. The method of claim 2 , wherein the layer of the carrier substrate and/or the layer of the handle substrate are chosen such that their Et 3 products are within about 20% or less.
4. The method of claim 2 , wherein the layer of the carrier substrate is provided with a chamfered edge region.
5. The method of claim 4 , wherein the carrier substrate is provided as a layer of a homogeneous high resistivity material.
6. The method of claim 5 , wherein the homogeneous high resistivity material has a resistivity of at least 10 kΩ·cm.
7. The method of claim 4 , wherein the layer of the carrier substrate is provided as a composite layer stack comprising:
a mechanical support layer; and
at least one layer of a high resistivity material deposited on the mechanical support layer; and
wherein an uppermost layer of the at least one layer of the high resistivity material is provided on the back main side of the active layer.
8. The method of claim 7 , wherein the uppermost layer of the at least one layer of the high resistivity material is attached onto the back main side of the active layer.
9. The method of claim 7 , further comprising, before the step of initiating mechanical separation, a step of replicating the at least one layer of a high resistivity material onto the handle substrate.
10. The method of claim 9 , wherein the step of replicating the at least one layer of the high resistivity material onto the handle substrate comprises replicating the at least one layer of the high resistivity material on a free side of the handle substrate opposite the active layer.
11. The method of claim 7 , wherein the mechanical support layer is a single-crystal or poly-crystal Si wafer.
12. The method of claim 7 , wherein a thickness of the high resistivity material deposited on the mechanical support layer is in a range of from 30 μm to 200 μm.
13. The method of claim 7 , wherein the high resistivity material is a ceramic glue, a polymer or a material with a resistivity of at least 10 kΩ·cm.
14. The method of claim 1 , wherein the carrier substrate is provided with a chamfered edge region.
15. The method of claim 1 , wherein the carrier substrate is provided as a layer of a homogeneous high resistivity material.
16. The method of claim 15 , wherein the homogeneous high resistivity material has a resistivity of at least 10 kΩ·cm.
17. The method of claim 1 , wherein the layer of the carrier substrate is provided as a composite layer stack comprising:
a mechanical support layer; and
at least one layer of a high resistivity material deposited on the mechanical support layer; and
wherein an uppermost layer of the at least one layer of the high resistivity material is provided on the back main side of the active layer.