Image sensor chip scale packages and related methods
Methods of forming an image sensor chip scale package. Implementations may include providing a semiconductor wafer having a pixel array, forming a first cavity through the wafer and/or one or more layers coupled over the wafer, filling the first cavity with a fill material, planarizing the fill material and/or the one or more layers to form a first surface of the fill material coplanar with a first surface of the one or more layers, and bonding a transparent cover over the fill material and the one or more layers. The bond may be a fusion bond between the transparent cover and a passivation oxide; a fusion bond between the transparent cover and an anti-reflective coating; a bond between the transparent cover and an organic adhesive coupled over the fill material, and/or; a bond between a first metallized surface of the transparent cover and a metallized layer coupled over the wafer.
1. A method of forming an image sensor chip scale package (CSP), comprising:
providing a semiconductor wafer (wafer) having an array of pixels;
forming a first cavity through one of the wafer and one or more layers coupled over the wafer;
filling the first cavity with a fill material;
planarizing one of the fill material and the one or more layers to form a first surface of the fill material that is coplanar with a first surface of the one or more layers, and;
forming an image sensor chip scale package (CSP) by bonding a transparent cover over the fill material and over the one or more layers using one of:
a fusion bond between the transparent cover and a passivation oxide, and;
a fusion bond between the transparent cover and an anti-reflective coating.
2. The method of claim 1 , wherein no adhesive is used to bond the transparent cover over the fill material and over the one or more layers.
3. The method of claim 1 , further comprising wherein when the fusion bond is between the transparent cover and the anti-reflective coating (ARC), the ARC is coupled over a passivation oxide layer.
4. The method of claim 1 , wherein the anti-reflective coating (ARC) is coupled over an organic layer.
5. The method of claim 1 , wherein the planarizing comprises chemical mechanical polishing (CMP).
6. The method of claim 1 , wherein the fill material comprises an oxide.
7. The method of claim 1 , further comprising forming one of a cavity and a lens in the transparent cover.
8. The method of claim 1 , wherein the image sensor CSP comprises a plurality of stacked semiconductor wafers.
9. The method of claim 1 , further comprising forming a second cavity through one of the wafer and the one or more layers and filling the second cavity with one of the fill material and a second fill material.
10. The method of claim 1 , wherein the first surface of the fill material is coplanar with a plane that intersects a color filter array (CFA) of the image sensor CSP.
11. A method of forming an image sensor chip scale package (CSP), comprising:
providing a semiconductor wafer (wafer) having an array of pixels;
forming a first cavity through one of the wafer and one or more layers coupled over the wafer;
filling the first cavity with a fill material;
planarizing one of the fill material and the one or more layers to form a first surface of the fill material that is coplanar with a first surface of the one or more layers, and;
after planarizing, forming an image sensor chip scale package (CSP) by bonding a transparent cover over the fill material and over the one or more layers by bonding the transparent cover with an organic adhesive coupled over the fill material.
12. The method of claim 11 , wherein the planarizing comprises chemical mechanical polishing (CMP).
13. The method of claim 11 , further comprising forming a second cavity through one of the wafer and the one or more layers, filling the second cavity with one of the fill material and a second fill material, and planarizing one of the fill material and the second fill material to form a second surface coplanar with the first surface of the one or more layers, the second surface formed directly over the second cavity.
14. The method of claim 11 , further comprising forming one or more openings through a layer defining the first cavity to test one or more electrical functions of the image sensor CSP.
15. A method of forming an image sensor chip scale package (CSP), comprising:
providing a semiconductor wafer (wafer) having an array of pixels;
forming a first cavity through one of the wafer and one or more layers coupled over the wafer;
filling the first cavity with a fill material;
planarizing one of the fill material and the one or more layers to form a first surface of the fill material that is coplanar with a first surface of the one or more layers, and;
forming an image sensor chip scale package (CSP) by bonding a transparent cover over the fill material and over the one or more layers by bonding a first metallized surface of the transparent cover with a metallized layer coupled over the wafer.
16. The method of claim 15 , wherein no adhesive used to bond the transparent cover over the fill material and over the one or more layers.
17. The method of claim 15 , wherein the first metallized surface comprises oxide in particular locations that correspond with particular locations of oxide comprised in the metallized layer.
18. The method of claim 15 , further comprising forming a second cavity through one of the wafer and the one or more layers, filling the second cavity with one of the fill material and a second fill material, planarizing one of the fill material and the second fill material to form a second surface coplanar with the first surface of the fill material, and bonding the transparent cover over a full diameter of the first cavity and over at least a portion of a diameter of the second cavity.
19. The method of claim 15 , further comprising forming one of a cavity and a global lens in the transparent cover.
20. The method of claim 15 , further comprising forming at least a portion of a testing contact within the first cavity, the testing contact configured to test one or more electrical functions of the image sensor CSP.