Circuit tracing using a focused ion beam
Methods and systems for tracing circuitry on integrated circuits using focused ion beam based imaging techniques. A first component or node on an integrated circuit is coupled to a second component or node on the same integrated circuit. After an external bias is applied to the first component or node, a focused ion beam is applied to the integrated circuit and an image is taken using an electron detector. The features or components on the integrated circuit which are coupled to the second component or node will show up in high contrast on the resulting image. The method may also involve applying a bias to a node or component and then using focused ion beam imaging techniques (through an electron detector) to arrive at an image of the integrated circuit. Components coupled to the node will appear in high contrast in the resulting image.
1. A method for identifying a signal path associated with a component of interest in an integrated circuit, the method comprising:
identifying a component of interest exposed on an integrated circuit device;
applying an external bias voltage to said component of interest;
capturing an image of at least a portion of said integrated circuit using a focused ion beam and an electron detector;
determining from said image a signal path associated with said component of interest shown in high contrast in said image due to electrical connectivity with said component of interest;
extending the signal path from a connected portion of said signal path, said connected portion in electrical connectivity with said component of interest, by coupling said connected portion to one or more unconnected portions of circuitry that are not in electrical connectivity with said component of interest; and
repeating said capturing and said determining.
2. The method of claim 1 , wherein the connected and unconnected portions are nodes on a given feature on said signal path.
3. The method of claim 2 , wherein the nodes of the given feature are a source and corresponding drain of the given feature.
4. The method of claim 2 , wherein the given feature comprises a gate.
5. The method of claim 2 , wherein the given feature comprises a transistor.
6. The method of claim 2 , wherein the given feature comprises a switch.
7. The method of claim 2 , wherein the given feature comprises a power switch.
8. The method of claim 2 , wherein the given feature comprises a buffer.
9. The method of claim 1 , wherein said extending and said repeating of said capturing and determining are iteratively repeated one or more times.
10. The method of claim 9 , wherein said iterative repeating is carried out until a signal path reaches one or more additional components of interest.
11. The method of claim 1 , wherein the parts of the integrated circuit to be imaged in the step of capturing is determined automatically from images from a prior captured image.
12. A system for identifying a signal path associated with a component of interest in an integrated circuit, the system comprising:
an ion beam chamber for receiving a circuit device, said ion beam chamber comprising a focused ion beam emitter configured to direct a focused ion beam towards said circuit device, and an electron detector for measuring an intensity of electrons resulting from an interaction of said focused ion beam and said circuit device, and a bias voltage connector for selectively applying an external voltage to the circuit device;
the electron detector configured to generate image data of at least a portion of said circuit device while the focused ion beam is directed toward said device and the external voltage has been applied to a component of interest on said circuit device, said image data defining a signal path on said circuit device associated with said component of interest, said signal path having high contrast relative to other parts of said circuit device in said image data due to electrical connectivity with said component of interest;
wherein the signal path is extended one or more times from a connected portion of said signal path to an unconnected portion of circuitry by coupling said connected portion to said unconnected portion and repeating said image data generation.
13. The system of claim 12 , wherein the connected and unconnected portions are nodes on a given feature on said signal path.
14. The system of claim 13 , wherein the nodes of the given feature are a source and corresponding drain of the given feature.
15. The system of claim 13 , wherein the given feature comprises a gate.
16. The system of claim 13 , wherein the given feature comprises a transistor.
17. The system of claim 13 , wherein the given feature comprises a switch.
18. The system of claim 13 , wherein the given feature comprises a power switch.
19. The system of claim 13 , wherein the given feature comprises a buffer.