Pixels for high performance image sensor
View Patent ↗Visual and near infrared pixels may have deep photodiodes to ensure sufficient capture of light. The pixels may have a silicon layer that is etched to form a microlens for the pixel. The pixels may include an inversion layer formed over the silicon layer to prevent dark current. Additionally, the pixels may include a conductive layer formed over the inversion layer that further prevents dark current. The conductive layer may be coupled to a bias voltage supply line. The conductive layer may be biased during image acquisition to prevent dark current. During readout, the bias voltage may be pulsed at a lower voltage to ensure all of the collected charge is transferred out of the photodiode during charge transfer.
1. An imaging pixel comprising:
a substrate;
a photodiode formed on the substrate;
a conductive layer that covers the imaging pixel such that incident light passes through the conductive layer to reach the photodiode; and
a bias voltage supply line that is coupled to the conductive layer and provides a bias voltage to the conductive layer, wherein the bias voltage supply line is configured to provide the bias voltage to the conductive layer during an image acquisition period, wherein the bias voltage supply line is configured to provide an additional bias voltage to the conductive layer during a readout period, and wherein the additional bias voltage is lower than the bias voltage.
2. The imaging pixel defined in claim 1 , wherein the imaging pixel is a back side illuminated imaging pixel, the imaging pixel further comprising:
a reflector formed on a front side of the imaging pixel.
3. The imaging pixel defined in claim 1 , wherein the conductive layer is formed on a back side of the imaging pixel, the imaging pixel further comprising:
an additional conductive layer formed on a front side of the imaging pixel, wherein the additional conductive layer is coupled to the bias voltage supply line.
4. The imaging pixel defined in claim 1 , wherein the conductive layer is formed on a back side of the imaging pixel, the imaging pixel further comprising:
an additional conductive layer formed on a front side of the imaging pixel, wherein the additional conductive layer is coupled to an additional bias voltage supply line that provides a different bias voltage than the bias voltage supply line.
5. The imaging pixel defined in claim 1 , wherein the imaging pixel includes doped silicon, and wherein the doped silicon is curved to form a microlens for the imaging pixel.
6. The imaging pixel defined in claim 1 , wherein the conductive layer comprises a material selected from the group consisting of: polysilicon, aluminum, tungsten, indium tin oxide, and metal mesh.
7. An imaging pixel comprising:
a substrate;
a photodiode formed on the substrate;
a conductive layer that covers the imaging pixel such that incident light passes through the conductive layer to reach the photodiode; and
a bias voltage supply line that is coupled to the conductive layer and provides a bias voltage to the conductive layer, wherein the imaging pixel includes doped silicon, and wherein the doped silicon is curved to form a microlens for the imaging pixel.
8. The imaging pixel defined in claim 7 , further comprising:
at least one inversion layer formed on the doped silicon that is interposed between the doped silicon and the conductive layer.
9. The imaging pixel defined in claim 8 , wherein the at least one inversion layer comprises at least one layer selected from the group consisting of: a hafnium oxide layer and tantalum pentoxide layer.
10. The imaging pixel defined in claim 7 , wherein the bias voltage supply line is configured to provide the bias voltage to the conductive layer during an image acquisition period, wherein the bias voltage supply line is configured to provide an additional bias voltage to the conductive layer during a readout period, and wherein the additional bias voltage is lower than the bias voltage.
11. The imaging pixel defined in claim 7 , wherein the conductive layer comprises a material selected from the group consisting of: polysilicon, aluminum, tungsten, indium tin oxide, and metal mesh.
12. An image sensor with an array of imaging pixels, the image sensor comprising:
a doped silicon substrate;
an implanted region formed on the doped silicon substrate;
epitaxial silicon formed on the implanted region, wherein the epitaxial silicon has etched portions that form trenches between each imaging pixel in the array of imaging pixels;
a conductive layer formed over the epitaxial silicon such that incident light passes through the conductive layer to reach the epitaxial silicon; and
a bias voltage supply line that is coupled to the conductive layer and provides a bias voltage to the conductive layer.
13. The image sensor defined in claim 12 , further comprising:
doped isolation regions formed in the implanted region, wherein the doped isolation regions are formed between each imaging pixel in the array of imaging pixels such that the trenches in the epitaxial silicon overlap the doped isolation regions.
14. The image sensor defined in claim 12 , wherein the implanted region has etched portions that form additional trenches between each imaging pixel in the array of imaging pixels such that the trenches in the epitaxial silicon overlap the additional trenches.
15. The image sensor defined in claim 12 , further comprising:
an inversion layer interposed between the conductive layer and the epitaxial silicon.
16. The image sensor defined in claim 12 , wherein the array of imaging pixels comprises a first row of imaging pixels, and wherein the conductive layer only covers the first row of imaging pixels.
17. The image sensor defined in claim 12 , wherein the array of imaging pixels comprises a first row of imaging pixels and an additional plurality of rows of imaging pixels, wherein the conductive layer covers the first row of imaging pixels, wherein the image sensor further comprises:
a plurality of additional conductive layers, wherein each conductive layer of the plurality of additional conductive layers covers a respective row of imaging pixels of the additional plurality of rows of imaging pixels; and
a plurality of additional bias voltage supply lines, wherein each bias voltage supply line of the plurality of additional bias voltage supply lines is coupled to a respective conductive layer of the plurality of additional conductive layers.