TEMPORARY ENERGY STORAGE FOR VOLTAGE SUPPLY INTERRUPTIONS

1 . A capacitor voltage limiter ( 240 ), comprising:

a supply node;

a pass element having a first current electrode coupled to the supply node, a control electrode, and a second current electrode adapted to be coupled to an external storage capacitor; and

an amplifier having a non-inverting input for receiving a reference voltage, an inverting input coupled to the second current electrode of the pass element, and an output coupled to the control electrode of the pass element; and

a rectifier having an input coupled to the second current electrode of the pass element, and an output coupled to the first current electrode of the pass element.

2 . The capacitor voltage limiter of claim 1 , wherein the rectifier comprises a PN junction diode.

3 . The capacitor voltage limiter of claim 2 , wherein:

the pass element comprises a metal-oxide-semiconductor (MOS) transistor;

the second current electrode of the pass element is coupled to a body thereof; and

the PN junction diode is a parasitic diode between the body and the first current electrode of the MOS transistor.

4 . The capacitor voltage limiter of claim 3 , wherein the MOS transistor comprises a P-channel MOS transistor.

5 . The capacitor voltage limiter of claim 1 , wherein the inverting input of the amplifier is coupled to the second current electrode of the pass element through a resistor divider.

6 . The capacitor voltage limiter of claim 1 , wherein the supply node is coupled to a first integrated circuit terminal, and the first current electrode of the pass element is coupled to a second integrated circuit terminal.

7 . A power supply system for delivering power to a load, comprising:

a first rectifier having an input terminal adapted to receive a variable voltage, and an output terminal; and

a capacitor voltage limiter for temporary energy storage, comprising:

a pass element having a first current electrode coupled to the output terminal of the first rectifier, a control electrode, and a second current electrode adapted to be coupled to a storage capacitor;

a second rectifier having an input terminal coupled to the second current electrode of the pass element, and an output terminal coupled to the first current electrode of the pass element; and

an amplifier having a non-inverting input for receiving a reference voltage, an inverting input coupled to the second current electrode of the pass element, and an output coupled to the control electrode of the pass element.

8 . The power supply system of claim 7 , wherein the second rectifier comprises a PN junction diode.

9 . The power supply system of claim 8 , wherein:

the pass element comprises a metal-oxide-semiconductor (MOS) transistor;

the second current electrode of the pass element is coupled to a body thereof; and

the PN junction diode is a parasitic diode between the body and first current electrode of the MOS transistor.

10 . The power supply system of claim 7 , wherein the pass element and the load are combined on a single integrated circuit.

11 . The power supply system of claim 7 , wherein the inverting input of the amplifier is coupled to the second current electrode of the pass element through a resistor divider.

12 . The power supply system of claim 7 , further comprising a regulator coupled between the output terminal of the first rectifier and the load.

13 . The power supply system of claim 12 , wherein the regulator comprises:

a second pass element having a first current electrode coupled to the output terminal of the first rectifier, a control electrode, and a second current electrode coupled to a power supply terminal of the load;

a second amplifier having a non-inverting input for receiving the reference voltage, and inverting input, and an output coupled to the control electrode of the second pass element; and

a second voltage divider for providing a predetermined fraction of a voltage at the power supply terminal of the load to the inverting input of the second amplifier.

14 . The power supply system of claim 12 , further comprising one or more of the capacitor voltage limiter, the regulator, and the load configured in one of a first configuration, a second configuration, and a third configuration, wherein:

the first configuration comprises the capacitor voltage limiter and the regulator combined on a single integrated circuit;

the second configuration comprises the capacitor voltage limiter, the regulator and the load combined on the single integrated circuit; and

the third configuration comprises the capacitor voltage limiter and the regulator combined to function as the load.

15 . A method for supplying voltage at a supply node, comprising:

receiving a rectified voltage at a supply node;

forming a portion of a voltage at a first terminal of a capacitor;

comparing the portion to a reference voltage;

charging the capacitor from the supply node in response to the comparing, wherein the comparing causes the charging when the portion is less than the reference voltage; and

powering a load coupled to the supply node using the capacitor through a rectifier having an input coupled to the capacitor and an output coupled to the supply node when a voltage at the supply node falls below the voltage at the first terminal of the capacitor by more than a predetermined voltage.

16 . The method of claim 15 , further comprising:

coupling a second terminal of the capacitor to a reference voltage terminal.

17 . The method of claim 15 , wherein receiving the rectified voltage at the supply node comprises:

receiving an input voltage at an input of a first rectifier; and

rectifying the input voltage to provide the input voltage, so rectified, to the supply node.

18 . The method of claim 15 , wherein conducting the first current from the supply node to the first terminal of the capacitor comprises:

modulating a conductivity of a transistor until the portion is substantially equal to the reference voltage.

19 . The method of claim 18 , wherein conducting the second current from the first terminal of the capacitor to the supply node comprises:

forming a diode between the first terminal of the capacitor and the supply node.

20 . The method of claim 19 , wherein forming the diode between the first terminal of the capacitor and the supply node comprises:

forming the transistor as a metal-oxide-semiconductor (MOS) transistor having a first current electrode coupled to the supply node and a second current electrode coupled to the first terminal of the capacitor; and

coupling the second current electrode of the transistor to a body thereof, thereby forming a parasitic diode.