Auto-tuning current limiter

1. A method of making a controller in a power conversion circuit, wherein the controller provides a drive signal, comprising:

providing an integration node in the controller;

providing a reference source coupled to the integration node and configured to integrate a first reference signal over a first time period when the drive signal is asserted to establish a threshold value; and

providing a second source coupled to the integration node and configured to generate a second signal approximately proportional to an output current of the power conversion circuit and integrate

the second signal over a second time period,

wherein the controller is configured to detect a fault condition if the integration of the second signal is greater than the integration of the first reference signal to exceed the threshold value.

2. The method of claim 1 , further including:

providing a comparator including a first input coupled to the integration node and a second input coupled to receive a second reference signal and an output indicating the fault condition; and

providing a logic circuit including an input coupled to the output of the comparator and an output providing the drive signal.

3. The method of claim 2 , wherein providing the logic circuit includes:

providing a counter including an input coupled to the output of the comparator to count an occurrence of the fault condition and disable the drive signal upon counting one or more fault conditions; and

providing a latch including an input coupled to an output of the counter and an output coupled to the output of the logic circuit.

4. The method of claim 1 , wherein the threshold value is an overcurrent value of the power conversion circuit.

5. The method of claim 1 , wherein providing the reference source includes:

providing a current source; and

providing a switch coupled between an output of the current source and the integration node, wherein the switch is controlled by the drive signal.

6. The method of claim 1 , wherein providing the second source includes:

providing a current source controlled by a current sense signal proportional to the output current of the power conversion circuit; and

providing a switch coupled between an output of the current source and the integration node, wherein the switch is controlled by the drive signal and a zero current detection signal.

7. A method of generating a voltage signal, comprising:

integrating a reference value over a first time period, wherein integrating the reference value includes increasing a voltage of a circuit node at a first rate proportional to the reference value;

integrating a second value over a second time period, wherein integrating the second value includes decreasing the voltage of the circuit node at a second rate proportional to the second value; and

asserting a fault signal if a result of the integration of the second value exceeds a result of the integration of the reference value.

8. The method of claim 7 , further including:

resetting the voltage of the circuit node to a reference voltage; and

asserting the fault signal if the voltage of the circuit node is decreased below the reference voltage.

9. The method of claim 7 , wherein integrating the reference value includes coupling a voltage source to an operational amplifier.

10. The method of claim 7 , wherein integrating the reference value includes coupling a current source to a capacitor.

11. A controller in a power conversion circuit, comprising:

an integration node;

a reference source coupled to the integration node for integrating a first reference signal over a first time period;

a second source generating a second signal proportional to an output current of the power conversion circuit, wherein the second source is coupled to the integration node to integrate the second signal over a second time period; and

a fault detector coupled to the integration node for detecting a fault condition if the integration of the second signal is greater than the integration of the first reference signal.

12. The controller of claim 11 , wherein the fault detector includes:

a comparator including a first input coupled to the integration node and a second input coupled to receive a second reference signal and an output indicating the fault condition; and

a logic circuit including an input coupled to the output of the comparator and an output providing a drive signal of the controller.

13. The controller of claim 12 , wherein the logic circuit includes:

a counter including an input coupled to the output of the comparator to count an occurrence of the fault condition and disable the drive signal upon counting one or more fault conditions; and

a latch including an input coupled to an output of the counter and an output coupled to the output of the logic circuit.

14. The controller of claim 11 , wherein the reference source includes:

a current source; and

a switch coupled between an output of the current source and the integration node.

15. The controller of claim 11 , wherein the second source includes:

a current source controlled by a current sense signal proportional to the output current of the power conversion circuit; and

a switch coupled between an output of the current source and the integration node.

16. The controller of claim 11 , further including a capacitor coupled to the integration node.

17. The controller of claim 11 , wherein the integration of the first reference signal over the first time period establishes a fault threshold of the fault detector.

18. The controller of claim 11 , wherein the reference source includes:

a voltage source; and

a switch coupled between an output of the voltage source and the integration node.

19. The controller of claim 11 , wherein the second source includes:

a voltage source controlled by a current sense signal proportional to the output current of the power conversion circuit; and

a switch coupled between an output of the voltage source and the integration node.

20. The controller of claim 11 , further including:

a comparator including a first input coupled to the integration node and a second input coupled to receive a second signal and an output coupled to the fault detector; and

a capacitor coupled between the output of the comparator and the first input of the comparator.