Second order detection of two orthogonal dithers for I/Q modulator bias control

1. A method implemented in a Dual Polarization (DP)-Inphase/Quadrature (I/Q) Mach-Zehnder Modulator (MZM) bias controller, the method comprising:

generating a pair of orthogonal dither signals;

multiplying the pair of orthogonal dither signals to create a second order dither signal; and

locking an Inphase (I) MZM of a DP-I/Q MZM to a value of a corresponding I component of a transmission signal by:

applying the pair of orthogonal dither signals to a Quadrature (Q) MZM and a Phase (P) MZM of the DP-I/Q MZM;

applying an I bias signal to the I MZM of the DP-I/Q MZM;

detecting an output of the DP-I/Q MZM; and

determining an I error signal in an output of the I MZM of the DP-I/Q MZM using a product of the second order dither signal received at a first input of an error signal generator and the output of the DP-I/Q MZM received at a second input of the error signal generator.

2. The method of claim 1 , further comprising:

locking the Q MZM of the DP-I/Q MZM to a value of a corresponding Q component of the transmission signal by:

applying the pair of orthogonal dither signals to the I MZM and the P MZM of the DP-I/Q MZM;

applying a Q bias signal to the Q MZM of the DP-I/Q MZM;

detecting an output of the DP-I/Q MZM; and

determining a Q error signal in an output of the Q MZM of the DP-I/Q MZM based on the product of the second order dither signal and the output of the DP-I/Q MZM.

3. The method of claim 2 , further comprising:

locking a phase of the DP-I/Q MZM to a value of a corresponding combined I/Q value of the transmission signal by:

applying the pair of orthogonal dither signals to the Q MZM and the I MZM of the DP-I/Q MZM;

applying a P bias signal to the P MZM of the DP-I/Q MZM;

detecting an output of the DP-I/Q MZM; and

determining a P error signal in the output of the DP-I/Q MZM based on the product of the second order dither signal and the output of the DP-I/Q MZM.

4. The method of claim 3 , further comprising:

iteratively adjusting the I bias signal based on the I error signal to support locking the I MZM to the I component of the transmission signal;

iteratively adjusting the Q bias signal based on the Q error signal to support locking the Q MZM to the Q component of the transmission signal; and

iteratively adjusting the P bias signal based on the P error signal to support locking the P MZM to the combined I/Q value of the transmission signal.

5. The method of claim 4 , wherein the I MZM, the Q MZM, and the P MZM are locked starting from arbitrary values and without pre-calibrating the DP-I/Q MZM.

6. The method of claim 4 , wherein the I MZM, the Q MZM, and the P MZM are locked when peak to peak driving voltage of transmission data (Vpp) is equal to a half-wave voltage (Vπ) of the DP-I/Q MZM.

7. The method of claim 3 , wherein the pair of orthogonal dither signals is applied to the I MZM and the Q MZM but not the P MZM when locking the P MZM.

8. The method of claim 3 , wherein the pair of orthogonal dither signals is applied to the I MZM and the P MZM but not the Q MZM when locking the Q MZM.

9. The method of claim 3 , wherein the pair of orthogonal dither signals is applied to the Q MZM and the P MZM but not the I MZM when locking the I MZM.

10. A Dual Polarization (DP) - Inphase/Quadrature (I/Q) Mach-Zehnder Modulator (MZM) bias controller comprising:

a Quadrature (Q) bias circuit configured to generate a Q bias signal for application to a Q MZM of a DP-I/Q MZM to lock the Q MZM to a value of a corresponding Q component of a transmission signal;

a dither signal generator configured to generate a pair of orthogonal dither signals;

a dither switch coupled to the Q bias circuit and the dither signal generator, the dither switch configured to combine the pair of orthogonal dither signals with an Inphase (I) bias signal and a Phase (P) bias signal; and

an error signal generator coupled to the Q bias circuit and the dither signal generator, the error signal generator configured to:

receive a second order orthogonal dither signal, the second order orthogonal dither signal a product of the pair of orthogonal dither signals;

receive an output of the DP-I/Q MZM; and

determine a Q error signal as the product of the output of the Q MZM of the DP-I/Q MZM and the second order dither signal.

11. The DP-I/Q MZM bias controller of claim 10 , further comprising a bias controller configured to cause the dither switch to combine the pair of orthogonal dither signals with the Q bias signal and the I bias signal but not the P bias signal when locking a P MZM of the DP-I/Q MZM to a combined I/Q value of the transmission signal.

12. The DP-I/Q MZM bias controller of claim 11 , wherein the bias controller is further configured to cause the dither switch to combine the pair of orthogonal dither signals with the Q bias signal and the P bias signal but not the I bias signal when locking an I MZM of the DP-I/Q MZM to an I value of the transmission signal.

13. The DP-I/Q MZM bias controller of claim 12 , wherein the bias controller is further configured to cause the dither switch to combine the pair of orthogonal dither signals with the I bias signal and the P bias signal but not the Q bias signal when locking the Q MZM of the DP-I/Q MZM to a Q value of the transmission signal.

14. The DP-I/Q MZM bias controller of claim 13 , wherein the bias controller is further configured to lock the I MZM, the Q MZM, and the P MZM starting from arbitrary values and without pre-calibrating the DP-I/Q MZM.

15. The DP-I/Q MZM bias controller of claim 13 , wherein the bias controller is further configured to lock the I MZM, the Q MZM, and the P MZM when a peak to peak driving voltage of transmission data (Vpp) is equal to a half-wave voltage (Vπ) of the DP-I/Q MZM.

16. The DP-I/Q MZM bias controller of claim 10 , further comprising an Inphase (I) bias circuit coupled to the dither switch, the I bias circuit configured to generate the I bias signal for application to an I MZM of the DP-I/Q MZM to lock the I MZM to a value of a corresponding I component of a transmission signal, wherein the dither switch is further configured to combine the pair of orthogonal dither signals with the Q bias signal, and wherein the error signal generator is further configured to determine an I error signal in the output of the I MZM of the DP-I/Q MZM based on the product of the second order dither signal and the output of the DP-I/Q MZM.

17. A method implemented in a Dual Polarization (DP) - Inphase/Quadrature (I/Q) Mach-Zehnder Modulator (MZM) bias controller, the method comprising:

generating a pair of orthogonal dither signals;

multiplying the pair of orthogonal dither signals to create a second order dither signal;

applying an Inphase (I) bias signal to an I MZM of a DP-I/Q MZM to lock the I MZM to a value of a corresponding I component of a transmission signal;

combining the pair of orthogonal dither signals with a Quadrature (Q) bias signal and a Phase (P) bias signal;

detecting an output of the DP-I/Q MZM; and

determining an I error signal in an output of the I MZM of the DP-I/Q MZM using a product of the second order dither signal received at a first input of an error signal generator and the output of the DP-I/Q MZM received at a second input of the error signal generator.

18. The method of claim 17 , further comprising:

applying a Q bias signal to a Q MZM of the DP-I/Q MZM to lock the Q MZM to a value of a corresponding Q component of the transmission signal;

combining the pair of orthogonal dither signals with the I bias signal and the P bias signal; and

determining a Q error signal in an output of the Q MZM of the DP-I/Q MZM based on the product of the second order dither signal and the output of the DP-I/Q MZM.

19. The method of claim 18 , further comprising:

applying the P bias signal to lock a P MZM of the DP-I/Q MZM to a combined I/Q value of the transmission signal; and

determining a P error signal in the output of the DP-I/Q MZM based on the product of the second order dither signal and the output of the DP-I/Q MZM.

20. The method of claim 19 , further comprising employing a time division multiplexing (TDM) scheme to apply the second order dither signal to the P bias signal, the I bias signal, and the Q bias signal such that the second order dither signal is:

applied to the I bias signal and the Q bias signal when the P MZM is being locked;

applied to the I bias signal and the P bias signal when the Q MZM is being locked; and

applied to the P bias signal and the Q bias signal when the I MZM is being locked.