IP Library › Granted Patent US 9,967,820
Granted Patent B2
US 9,967,820 · App. 15/196,070 · Granted May 8, 2018

Wake up radio device, circuit configuration, and method

Inventors: Richard Dorrance (Portland, OR); Minyoung Park (Portland, OR); Alexander W. Min (Portland, OR); Farhana Sheikh (Portland, OR)
Assignee: Intel Corporation
H04W52/0229H04L69/22
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Quick Facts
Patent No.
US 9,967,820
App. No.
15/196,070
Granted
May 8, 2018
Kind
B2
Abstract

According to the present disclosure, a communication device configured to power on a main receiver to receive data from a network includes: a low power receiver configured to receive a wake up packet, including a preamble, from the network and oversample the wake up packet; a circuit arrangement including: a correlator configured to correlate the oversampled portion of the preamble; a delay and adder configured to take an output of the correlator, delay the output of the correlator, and add the output of the correlator back onto itself to produce a delay output; a peak detector configured to detect a peak pattern in the delay output; a demodulator configured to calculate a decoding threshold value to produce a demodulated data; and a packet parser configured to check the demodulated data for a data set in order to selectively output a nonzero signal to power on the main receiver.

Claims (27)

1. A communication device configured to power on a main receiver to receive data from a network comprising:

a low power receiver configured to receive a wake up packet, comprising a preamble, from the network and oversample the wake up packet;

a circuit arrangement comprising:

a correlator configured to correlate the oversampled portion of the preamble;

a delay and adder configured to take an output of the correlator, delay the output of the correlator, and add the output of the correlator back onto itself to produce a delay output;

a peak detector configured to detect a peak pattern in the delay output;

a demodulator configured to calculate a decoding threshold value to produce a demodulated data; and

a packet parser configured to check the demodulated data for a data set in order to selectively output a nonzero signal to power on the main receiver.

2. The communication device of claim 1 , wherein the wake up packet further comprises a receiver ID, a payload, and a frame check sequence.

3. The communication device of claim 1 , the low power receiver further configured to oversample the wake up packet about 16 times to generate 16 samples per bit.

4. The communication device of claim 3 , the circuit arrangement further configured to average the 16 samples of each of the bits of the wake up packet.

5. The communication device of claim 1 , wherein the correlator is a 240-bit correlator.

6. The communication device of claim 1 , wherein the delay and adder is configured to delay the output of the correlator by about 240 cycles.

7. The communication device of claim 1 , wherein the peak detector is configured to detect the peak pattern after determining that the peak pattern has a value greater than a first threshold.

8. The communication device of claim 1 , the peak detector further configured to determine the peak pattern by detecting the maximum of the AD output using a rolling window, wherein the rolling window determines a local maximum of the AD output within its bounds and compares it to a previously determined maximum of the AD output.

9. The communication device of claim 8 , wherein the peak detector is configured to compare the maximum of the AD output to a second threshold value.

10. The communication device of claim 9 , wherein the demodulator is further configured to demodulate the data if the maximum of the AD output is greater than the second threshold value.

11. The communication device of claim 1 , wherein the data set comprises a receiver ID, wherein the packet parser is further configured to check if the receiver ID matches a communication device ID.

12. A circuit arrangement comprising:

a correlator configured to correlate an oversampled portion of a preamble of a wake up packet;

a delay and adder configured to take an output of the correlator, delay the output of the correlator, and add the output of the correlator back onto itself to produce a delay output;

a peak detector configured to detect a peak pattern in the delay output;

a demodulator configured to calculate a decoding threshold value to produce a demodulated data of the wake up packet; and

a packet parser configured to check the demodulated data for a data set in order to selectively output a nonzero signal.

13. The circuit arrangement of claim 12 , further comprising a receiving circuit which oversamples the wake up packet.

14. The circuit arrangement of claim 13 , wherein the receiving circuit oversamples the wake up packet about 16 times to generate 16 samples per bit.

15. The circuit arrangement of claim 14 , further comprising a sample averaging circuit configured to average the 16 samples of each of the bits of the wake up packet.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 14, 2020
From: INTEL CORPORATION
To: APPLE INC.
Reel/Frame 052414/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 7, 2016
From: DORRANCE, RICHARD; PARK, MINYOUNG; MIN, ALEXANDER W.; SHEIKH, FARHANA
To: INTEL CORPORATION
Reel/Frame 039645/0707 →
Continuity (1)
Related Publication 20180007629A1 · Jan 4, 2018