IP Library › Granted Patent US 10,332,957
Granted Patent B2
US 10,332,957 · App. 15/198,800 · Granted Jun 25, 2019

Stacked capacitor with symmetric leakage and break-down behaviors

Inventors: Takashi Ando (Tuckahoe, NY); Eduard A. Cartier (New York, NY); Vijay Narayanan (New York, NY); Adam M. Pyzyna (Cortlandt Manor, NY)
Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
H01L28/75
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Quick Facts
Patent No.
US 10,332,957
App. No.
15/198,800
Granted
Jun 25, 2019
Kind
B2
Abstract

A layered structure including a tri-stack dielectric layer and a plurality of metal layers insulated from each other by the tri-stack dielectric layer. The plurality of metal layers includes a set of first-type metal layers and a set of second-type metal layers. An adjacent pair of the plurality of metal layers includes a first-type metal layer and a second-type metal layer. The tri-stack dielectric layer includes a first tri-stack layer including Al 2 O 3 , a second tri-stack layer including HfO 2 ; and a third tri-stack layer including Al 2 O 3 .

Claims (37)

1. A stacked planar capacitor, comprising:

a first metal layer;

a first tri-stack dielectric layer disposed on a surface of the first metal layer;

a second metal layer disposed on a surface of the first tri-stack dielectric layer;

a second tri-stack dielectric layer disposed on a surface of the second metal layer; and

a third metal layer disposed on a surface of the second tri-stack dielectric layer;

wherein each of the first tri-stack dielectric layer and the second tri-stack dielectric layer comprises:

a first tri-stack layer comprising Al 2 O 3 ;

a second tri-stack layer comprising HfO 2 ; and

a third tri-stack layer comprising Al 2 O 3 ;

wherein the first metal layer, the first tri-stack dielectric layer, and the second metal layer define a first capacitor comprising a first electrical bias polarity;

wherein the second metal layer, the second tri-stack dielectric layer, and the third metal layer define a second capacitor comprising a second electrical bias polarity, the second electrical bias polarity opposite the first electrical bias polarity; and

wherein a dielectric break-down behavior is symmetric for both biasing polarities.

2. The capacitor of claim 1 , wherein a thickness of each of the first metal layer, the second metal layer, and the third metal layer is about 200 Angstroms to about 400 Angstroms.

3. The capacitor of claim 1 , wherein each of the first metal layer, the second metal layer, and the third metal layer comprises TiN.

4. The capacitor of claim 1 , wherein a thickness of each of the first tri-stack layer and the second tri-stack layer is about 5 Angstroms to about 100 Angstroms.

5. The capacitor of claim 1 , wherein a thickness of each of the first tri-stack layer and the second tri-stack layer is about 10 Angstroms to about 80 Angstroms.

6. The capacitor of claim 1 , wherein a thickness of each of the first tri-stack layer and the second tri-stack layer is about 15 Angstroms to about 50 Angstroms.

7. The capacitor of claim 1 ,

wherein the second tri-stack layer comprising HfO 2 is disposed over the first tri-stack layer comprising Al 2 O 3 , and

wherein the third tri-stack layer comprising Al 2 O 3 is disposed over the second tri-stack layer comprising HfO 2 .

8. The capacitor of claim 7 ,

wherein a thickness of each of the first tri-stack layer comprising Al 2 O 3 and the third tri-stack layer comprising Al 2 O 3 is about 3 Angstroms to about 10 Angstroms; and

wherein a thickness of the second tri-stack layer comprising HfO 2 is about 10 Angstroms to about 60 Angstroms.

9. A method to form a planar capacitor, comprising:

providing a first metal layer,

disposing a first tri-stack dielectric layer on a surface of the first metal layer;

disposing a second metal layer on a surface of the first tri-stack dielectric layer;

disposing a second tri-stack dielectric layer on a surface of the second metal layer; and

disposing a third metal layer on a surface of the second tri-stack dielectric layer,

wherein each of the first tri-stack dielectric layer and the second tri-stack dielectric layer comprises:

a first tri-stack layer comprising Al 2 O 3 ;

a second tri-stack layer comprising HfO 2 ; and

a third tri-stack layer comprising Al 2 O 3 .

10. The method of claim 8 ,

wherein the second tri-stack layer comprising HfO 2 is disposed over the first tri-stack layer comprising Al 2 O 3 , and

wherein the third tri-stack layer comprising Al 2 O 3 is disposed over the second tri-stack layer comprising HfO 2 .

Assignments (2)
CORRECTIVE ASSIGNMENT TO CORRECT THE DOCKET NUMBER PREVIOUSLY RECORDED ON REEL 039185 FRAME 0413. ASSIGNOR(S) HEREBY CONFIRMS THE DOCKET NUMBER SHOULD BE CHANGED FROM I780836US TO YOR920160609US1. Recorded Sep 6, 2016
From: ANDO, TAKASHI; CARTIER, EDUARD A.; NARAYANAN, VIJAY; PYZYNA, ADAM M.
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 039917/0863 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 19, 2016
From: ANDO, TAKASHI; CARTIER, EDUARD A.; NARAYANAN, VIJAY; PYZYNA, ADAM M.
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 039185/0413 →
Continuity (1)
Related Publication 20180006108A1 · Jan 4, 2018