Electronic device for ESD protection
An electronic device includes a thyristor having an anode, a cathode, a first bipolar transistor disposed on the anode side. A second bipolar transistor is disposed on the cathode side. These two bipolar transistors are nested and connected between the anode and the cathode. A MOS transistor is coupled between the collector region and the emitter region of the second bipolar transistor. The transistor has a gate region connected to the cathode via a resistive semiconductor region incorporating at least a part of the base region of the second bipolar transistor.
1. A semiconductor device comprising:
a semiconductor film disposed over an insulating layer, the insulating layer being disposed over a carrier substrate;
a first semiconductor region having a first conductivity type and being disposed in the semiconductor film;
a second semiconductor region having a second conductivity type opposite the first conductivity type and being disposed in the semiconductor film adjacent the first semiconductor region;
a gate region that extends over at least a portion of the second semiconductor region;
a third semiconductor region having the second conductivity type and being disposed in the semiconductor film adjacent the first semiconductor region and spaced from the second semiconductor region by the first semiconductor region;
a fourth semiconductor region having the first conductivity type and being disposed in the semiconductor film adjacent the second semiconductor region and spaced from the first semiconductor region by the second semiconductor region;
a first metallization electrically connecting the gate region to a first location of the second semiconductor region; and
a second metallization electrically connecting a second location of the second semiconductor region to the fourth semiconductor region, such that part of the second semiconductor region located between first and second locations forms a resistive semiconductor region.
2. The semiconductor device according to claim 1 , wherein the second semiconductor region and the resistive semiconductor region extend beyond an edge of the gate region.
3. The semiconductor device according to claim 1 , wherein the first conductivity type is n-type and the second conductivity type is p-type.
4. The semiconductor device according to claim 1 , wherein the first conductivity type is p-type and the second conductivity type is n-type.
5. The semiconductor device according to claim 1 , wherein:
the first semiconductor region includes a base region of a first bipolar transistor and a collector region of a second bipolar transistor;
the second semiconductor region includes a base region of the second bipolar transistor and a collector region of the first bipolar transistor, at least a portion of the base region of the second bipolar transistor forming the resistive semiconductor region;
the third semiconductor region includes an emitter region of the first bipolar transistor; and
the fourth semiconductor region includes an emitter region of the second bipolar transistor.
6. The semiconductor device according to claim 5 , wherein the semiconductor device includes a thyristor with an anode and a cathode, wherein the anode is formed by the third semiconductor region and the cathode is formed by the fourth semiconductor region.
7. The semiconductor device according to claim 6 , wherein the semiconductor device further includes a MOS transistor, wherein the first semiconductor region forms a first source/drain region of the MOS transistor, the fourth semiconductor region forms a second source/drain region of the MOS transistor, and the gate region forms a gate of the MOS transistor.
8. The semiconductor device according to claim 7 , wherein a trigger voltage of the semiconductor device according is determined by a length of the resistive semiconductor region.
9. A semiconductor device comprising:
a semiconductor film disposed over an insulating layer, the insulating layer being disposed over a carrier substrate;
a thyristor, comprising:
an anode,
a cathode,
a first bipolar transistor, and
a second bipolar transistor, the first and second bipolar transistors being nested and connected between the anode and the cathode; and
a MOS transistor, the MOS transistor coupled between a collector region and an emitter region of the second bipolar transistor, the MOS transistor having a gate region connected to the cathode via a resistive semiconductor region that incorporates at least a part of a base region of the second bipolar transistor.
10. The semiconductor device according to claim 9 , wherein the semiconductor film comprises:
a first semiconductor region having a first conductivity type and including a base region of the first bipolar transistor and also the collector region of the second bipolar transistor; and
a second semiconductor region having a second conductivity type opposite to the first conductivity type, incorporating the resistive semiconductor region, the base region of the second bipolar transistor and the collector region of the first bipolar transistor, wherein the gate region extends at least over the base region of the second bipolar transistor.
11. The semiconductor device according to claim 10 , wherein the semiconductor film further comprises:
a third semiconductor region having the second conductivity type and including the anode and the emitter region of the first bipolar transistor;
a fourth semiconductor region having the first conductivity type and including the cathode and the emitter region of the second bipolar transistor;
a first metallization electrically connecting the gate region to a first location of the second semiconductor region; and
a second metallization electrically connecting a second location of the second semiconductor region to the fourth semiconductor region, the part of the second semiconductor region located between two locations forming the resistive semiconductor region.
12. The semiconductor device according to claim 11 , wherein the first conductivity type is n-type and the second conductivity type is p-type.
13. The semiconductor device according to claim 11 , wherein the first conductivity type is p-type and the second conductivity type is n-type.
14. The semiconductor device according to claim 10 , wherein the second semiconductor region and the resistive semiconductor region extend beyond an edge of the gate region.
15. The semiconductor device according to claim 9 , wherein the resistive semiconductor region determines a trigger voltage of the semiconductor device.
16. A network of semiconductor devices, the network of semiconductor devices comprising:
a first and second semiconductor device, each of the first and second semiconductor devices comprising:
an input;
an output;
a semiconductor film disposed over an insulating layer, the insulating layer being disposed over a carrier substrate;
a thyristor, comprising:
an anode,
a cathode,
a first bipolar transistor, and
a second bipolar transistor, the first and second bipolar transistors being nested and connected between the anode and the cathode; and
a MOS transistor, the MOS transistor coupled between a collector region and an emitter region of the second bipolar transistor, the MOS transistor having a gate region connected to the cathode via a resistive semiconductor region that incorporates at least a part of a base region of the second bipolar transistor,
wherein:
the input of the first semiconductor device is coupled to the output of the second semiconductor device, and
the output of the first semiconductor device is coupled to the input of the second semiconductor device.
17. The network of semiconductor devices of claim 16 , wherein in the first and second semiconductor devices, the input is coupled to the anode of the thyristor and the output is coupled to the cathode of the thyristor.
18. The network of semiconductor devices of claim 17 , wherein the first and second semiconductor devices are disposed on the same semiconductor film.
19. The network of semiconductor devices of claim 17 , wherein the input of the first semiconductor device is coupled to a first terminal of a power supply, and wherein the output of the first semiconductor device is coupled to a second terminal of the power supply.
20. The network of semiconductor devices of claim 16 , further comprising third and fourth semiconductor devices, each configured according to the first and second semiconductor devices, wherein the input of the third semiconductor device is coupled to the input of the first semiconductor device, the output of the third semiconductor device is coupled to the input of the fourth semiconductor device, and the output of the fourth semiconductor device is coupled to the output of the first semiconductor device.