Electronic component package and electronic device including the same
An electronic component package may include: a redistribution layer including a first insulating layer, a first conductive pattern disposed on the first insulating layer, and a first via connected to the first conductive pattern while penetrating through the first insulating layer; an electronic component disposed on the redistribution layer; and an encapsulant encapsulating the electronic component. The first via has a horizontal cross-sectional shape in which a distance between first and second edge points of the first via in a first direction passing through the center of the first via and the first and second edge points thereof is shorter than that between third and fourth edge points of the first via in a second direction perpendicular to the first direction and passing through the center of the first via and the third and fourth points thereof.
1. An electronic component package comprising:
a redistribution layer including a first insulating layer, a plurality of first conductive patterns disposed on a first side of the first insulating, and a plurality of first vias penetrating through the first insulating layer, electrically connected to the plurality of first conductive patterns, and including a via V;
an electronic component disposed on a second side of the first insulating layer opposing the first side; and
an encapsulant encapsulating the electronic component,
wherein
the via V satisfies D 1 <D 2 , where C 1 is a center of the electronic component package, C 2 is the center of the via V, L 1 is a virtual line connecting C 1 and C 2 along a diagonal line of the electronic component, L 2 is a virtual line perpendicular to L 1 and passing through C 2 , D 1 is a distance between two points in the virtual line L 1 and on an edge of the via V at which the edge meets L 1 , and D 2 is a distance between two points in the virtual line L 2 and on the edge of the via V at which the edge meets L 2 ,
the via V is in direct contact with an electrode pad of the electronic component and is disposed at a first outmost corner of the electronic component in the diagonal line,
the plurality of first vias includes another via V 1 disposed at a second outmost corner of the electronic component in the diagonal line and having a shape substantially the same as the via V, and
the plurality of first vias includes at least one circular-shaped via disposed between the first and second outmost corners.
2. The electronic component package of claim 1 , wherein the horizontal cross-sectional shape of the via V is oval, rectangular, diamond, or hexagonal.
3. The electronic component package of claim 1 , wherein the redistribution layer further includes a second insulating layer disposed on the first insulating layer, a second conductive pattern disposed on the second insulating layer, and a second via connecting one of the plurality of first conductive patterns and the second conductive pattern to each other while penetrating through the second insulating layer,
the second via having a horizontal cross-sectional shape of which a distance between fifth and sixth edge points of the second via on a virtual line passing through a center of the second via and the fifth and sixth edge points thereof in a third direction is shorter than a distance between seventh and eighth edge points of the second via on a virtual line passing through a center of the second via and the seventh and eighth edge points thereof in a fourth direction perpendicular to the third direction.
4. The electronic component package of claim 3 , wherein the second via satisfies D 3 <D 4 , in which C 3 is the center of the second via, L 3 is a virtual line connecting C 1 and C 3 to each other, L 4 is a virtual line perpendicular to L 3 and passing through C 3 , D 3 is a distance between two points on an edge of the second via at which the edge meets L 3 , and D 4 is a distance between two points on the edge of the second via at which the edge meets L 4 .
5. The electronic component package of claim 3 , wherein the second via satisfies θ 3 <θ 4 , in which C 3 is the center of the second via, L 3 is a virtual line connecting C 1 and C 3 to each other, θ 3 is an angle between a virtual line across distance S 3 of the second via in the third direction and L 3 , and θ 4 is an angle between a virtual line across distance S 4 of the second via in the fourth direction and L 3 .
6. The electronic component package of claim 3 , wherein the redistribution layer includes a first region corresponding to a region in which the electronic component is disposed and a second region enclosing the first region, and
the second via is disposed in at least one of a corner of an outermost portion of the first region and a corner of an outermost portion of the second region.
7. The electronic component package of claim 3 , wherein the redistribution layer includes a first region corresponding to a region in which the electronic component is disposed and a second region enclosing the first region, and
the second via is disposed in at least one of a corner portion of an outermost portion of the first region and a corner portion of an outermost portion of the second region.
8. The electronic component package of claim 3 , wherein the redistribution layer includes a first region corresponding to a region in which the electronic component is disposed and a second region enclosing the first region, and
the second via is disposed in at least one of an outermost portion of the first region and an outermost portion of the second region.
9. The electronic component package of claim 3 , wherein the redistribution layer includes a first region corresponding to a region in which the electronic component is disposed and a second region enclosing the first region, and
the second via is disposed at a corner portion of an outer portion of the second region.
10. The electronic component package of claim 3 , wherein the redistribution layer includes a first region corresponding to a region in which the electronic component is disposed and a second region enclosing the first region, and
the second via is disposed at an outermost corner of the first region and a portion of the second region enclosing the corner of the outermost portion of the first region.
11. The electronic component package of claim 1 , further comprising:
a passivation layer disposed below the redistribution layer and having an opening; and
a connection terminal disposed in the opening of the passivation layer.
12. The electronic component package of claim 11 , wherein the passivation layer is a solder resist layer, and
the connection terminal is a solder ball.
13. The electronic component package of claim 1 , further comprising a frame disposed on the redistribution layer and having a through hole,
wherein the electronic component is disposed in the through hole of the frame.
14. The electronic component package of claim 13 , further comprising:
a penetration wiring penetrating through the frame; and
conductive wiring patterns disposed on both surfaces of the frame opposing each other, and connected to each other by the penetration wiring,
wherein the penetration wiring and the wiring pattern are electrically connected to the electronic component through the redistribution layer.
15. The electronic component package of claim 1 , wherein the via V is the only via that is in direct contact with the electrode pad of the electronic component.