Method for reducing bipolar degradation in an SIC semiconductor device and semiconductor device

1. A method for forming a semiconductor device, comprising:

in a SIC semiconductor body, forming crystal defects in a first semiconductor region by introducing non-doping particles into the semiconductor body;

forming a second semiconductor region such that there is a pn-junction between the first semiconductor region and the second semiconductor regions; and

wherein the semiconductor device is selected from the, group consisting of:

a bipolar diode comprising a base region as the semiconductor region, and an emitter region as the second semiconductor region; and

an MOS transistor device comprising a drift region as the first semiconductor region, and a body region as the second semiconductor region.

2. The method of claim 1 , wherein the crystal defects comprise at least one of point defects and complexes with several point defects.

3. The method of claim 2 ,

wherein the first semiconductor region comprises a length in a direction facing away from the pn-junction, and

wherein forming the defect region comprises forming the defect region such that a shortest distance between the pn-junction and the defect region is at least 50% of the length.

4. The method of claim 2 ,

wherein the first semiconductor region comprises a length in a direction facing away from the pn-junction, and

wherein forming the defect region comprises forming the defect region such that a dimension of the defect region in the direction facing away from the pn-junction is at least 10% of the length.

5. The method of claim 1 , wherein forming the crystal defects comprises forming the crystal defects such that there is a defect region in the first semiconductor region, wherein a concentration of crystal defects in the defect region is between 1E16 cm −3 and 1E21 cm −3 .

6. The method of claim 1 , wherein introducing the non-doping particles comprises implanting the non-doping particles via a first surface into the semiconductor body.

7. The method of claim 6 , wherein the particles include at least one type of particles that are selected from a group consisting of:

protons;

noble gas ions;

group-IV ions; and

heavy metal ions.

8. The method of claim 7 , wherein the noble gas ions comprise helium ions.

9. The method of claim 7 , wherein the heavy metal ions are selected from the group consisting of:

platinum ions;

gold ions; and

vanadium ions.

10. The method of claim 6 , wherein implanting the non-doping particles via the first surface into the semiconductor body comprises implanting the particles at least at two different implantation energies.

11. The method of claim 1 , wherein introducing the non-doping particles comprises introducing the particles during epitaxially growing the first semiconductor region.

12. The method of claim 11 , wherein the non-doping particles comprise Germanium atoms.

13. The method of claim 1 , wherein the semiconductor body comprises SiC of one of the 4H and 6H polytype.

14. The method of claim 1 ,

wherein the first semiconductor region comprises a length in a direction facing away from the pn-junction,

wherein forming the crystal defects comprises forming a maximum of a crystal defect concentration in the first semiconductor region, and

wherein forming the maximum comprises forming the maximum such that a shortest distance between the pn-junction and a position of the maximum is at least 50% of the length.

15. The method of claim 14 , wherein forming the maximum comprises forming the maximum such that a shortest distance between the pn-junction and a position of the maximum is at least 66% of the length or at least 75% of the length.

16. The method of claim 1 , wherein forming the crystal defects comprises forming a defect region in the first semiconductor region where a minority charge carrier lifetime is less than 1 microsecond.

17. A semiconductor device, comprising:

in an SiC semiconductor body, a pn-junction between a first semiconductor region and a second semiconductor region;

crystal defects in the first semiconductor region induced by introducing particles into the semiconductor body; and

wherein the semiconductor device is selected from the group consisting of:

a bipolar diode comprising a base region as the first semiconductor region, and an emitter region as the second semiconductor region; and

an MOS transistor device comprising a drift region as the first semiconductor region, and a body region as the second semiconductor region.

18. The semiconductor device of claim 17 , wherein the crystal defects comprise at least one of point defects and complexes with several point defects.

19. The semiconductor device of claim 17 , comprising a defect region that comprises the crystal defects, wherein a concentration of the crystal defects in the defect region is between 1E16 cm −3 and 1E21 cm −3 .

20. The semiconductor device of claim 19 ,

wherein the first semiconductor region comprises a length in a direction facing away from the pn-junction, and

wherein a shortest distance between the pn-junction and the defect region is at least 50% of the length.

21. The semiconductor device of claim 17 , wherein the crystal defects are induced by implanting the non-doping particles via a first surface into the semiconductor body.

22. The semiconductor device of claim 21 , wherein the non-doping particles include at least one type of particles that are selected from a group consisting of:

protons;

noble gas ions;

group-IV ions; and

heavy metal ions.

23. The semiconductor device of claim 22 , wherein the noble gas ions comprise helium ions.

24. The semiconductor device of claim 22 , wherein the heavy metal ions are selected from the group consisting of:

platinum ions;

gold ions; and

vanadium ions.

25. The semiconductor device of claim 17 , wherein the crystal defects are induced by introducing the particles during epitaxially growing the first semiconductor region.

26. The semiconductor device of claim 25 , wherein the non-doping particles comprise Germanium atoms.

27. The semiconductor device of claim 17 ,

wherein the first semiconductor region comprises a length in a direction facing away from the pn-junction,

wherein there is a maximum of a crystal defect concentration in the first semiconductor region, and

wherein a shortest distance between the pn-junction and a position of the maximum is at least 50% of the length.

28. The semiconductor device of claim 27 , wherein a shortest distance between the pn junction and a position of the maximum is at least 66% of the length or at least 75% of the length.

29. The semiconductor device of claim 17 ,

wherein the first semiconductor region comprises a length in a direction facing away from the pn-junction, and

wherein a dimension of the defect region in the direction facing away from the pn-junction is at least 10% of the length.

30. The semiconductor device of claim 17 , wherein, in the defect region in the first semiconductor region, a minority charge carrier lifetime is less than 1 microsecond.

31. The semiconductor device of claim 17 , wherein the semiconductor device is a bipolar diode comprising a base region as the first semiconductor region, and an emitter region as the second semiconductor region.

32. The semiconductor device of claim 31 , further comprising a second emitter region of the same doping type as the base region and adjoining the base region.

33. The semiconductor device of claim 17 , wherein the semiconductor device is an MOS transistor device comprising a drift rigion as the first semiconductor region, and a body region as the second semiconductor region.

34. The semiconductor device of claim 33 , further comprising:

a drain region; and

a gate electrode adjacent the body region and dielectrically insulated from the body region by a gate dielectric.

35. The semiconductor device of claim 33 , wherein the MOS transistor is one of a MOSFET and an IGBT.

36. The semiconductor device of claim 17 , wherein the semiconductor body comprises SiC of one of the 4H and 6H polytype.