IP Library › Granted Patent US 9,835,811
Granted Patent B2
US 9,835,811 · App. 15/211,142 · Granted Dec 5, 2017

Transceiver and interface for IC package

Inventors: Eric J. Zbinden (New Albany, IN); Randall E. Musser (New Albany, IN); Jean-Marc A. Verdiell (New Albany, IN); John A. Mongold (New Albany, IN); Brian R. Vicich (New Albany, IN); Keith R. Guetig (New Albany, IN)
Assignee: SAMTEC, INC.
G02B6/4284G02B6/428G02B6/4232G02B6/4246G02B6/4249G02B6/4261G02B6/4269G02B6/4278G02B6/4279G02B6/4292G02B6/4293H01R12/716H01R13/639H04B1/3833H04B10/2504H04B10/27H04B10/40H04B10/801H04B10/803H05K7/20418H01L2224/48091H01L2224/49175
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Quick Facts
Patent No.
US 9,835,811
App. No.
15/211,142
Granted
Dec 5, 2017
Kind
B2
Abstract

An interconnect system includes a first circuit board, first and second connectors connected to the first circuit board, and a transceiver including an optical engine and arranged to receive and transmit electrical and optical signals through a cable, to convert optical signals received from the cable into electrical signals, and to convert electrical signals received from the first connector into optical signals to be transmitted through the cable. The transceiver is arranged to mate with the first and second connectors so that at least some converted electrical signals are transmitted to the first connector and so that at least some electrical signals received from the cable are transmitted to the second connector.

Claims (28)

1. A transceiver comprising:

a circuit board that is configured to connect to a two-piece connector system and that includes first, second, and third lands located on the circuit board, wherein

the first lands are located on a top of the circuit board,

the second and third lands are located on a bottom of the circuit board,

the second lands are located opposite the first lands,

the third lands are located near a back end of the circuit board opposite to a front end of the circuit board with the first and second lands,

the first and second lands are configured to connect with a front connector of the two-piece connector system, and

the third lands are configured to connect with a back connector of the two-piece connector system.

2. The transceiver of claim 1 , wherein the front end of the circuit board mates with the front connector.

3. The transceiver of claim 1 , wherein the third lands engage a row of contacts on the back connector.

4. The transceiver of claim 1 , wherein the transceiver is pressed down onto the back connector and then pressed forward so that the front end of the circuit board is inserted into the front connector.

5. The transceiver of claim 4 , wherein the front end of the circuit board is pulled out of the front connector.

6. The transceiver of claim 1 , wherein high-speed signals are transmitted through the first and the second lands and low-speed signals and/or power are transmitted through the third lands.

7. The transceiver of claim 1 , wherein

the front connector is a card-edge connector and the back connector is a compression connector, and

the third lands comprise a single row of lands.

8. The transceiver of claim 3 , wherein the third lands comprise a single row of lands.

9. The transceiver of claim 1 , wherein the transceiver latches to the two piece connector system.

10. The transceiver of claim 9 , wherein the transceiver latches to the back connector.

11. The transceiver of claim 1 , further comprising a heat sink.

12. The transceiver of claim 1 , further comprising an optical engine.

13. A transceiver interconnect system comprising:

the transceiver of claim 1 ; and

a two-piece connector system including the front connector and the back connector.

14. The transceiver interconnect system of claim 13 , wherein the front connector includes a first row of contacts that engage with the first lands and a second row of contacts that engage with the second lands.

15. The transceiver interconnect system of claim 13 , wherein

the front connector is a card-edge connector, and

the back connector is a compression connector.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 15, 2016
From: ZBINDEN, ERIC J.; MUSSER, RANDALL E.; VERDIELL, JEAN-MARC A.; MONGOLD, JOHN A.; VICICH, BRIAN R.; GUETIG, KEITH R.
To: SAMTEC, INC.
Reel/Frame 039165/0015 →
Continuity (9)
Continuation 15181762 · Jun 14, 2016
Continuation 15157548 · May 18, 2016
Continuation 14295367 · Jun 4, 2014
Continuation 13895571 · May 16, 2013
Continuation 13758464 · Feb 4, 2013
Continuation 13539173 · Jun 29, 2012
Provisional Application 61504072 · Jul 1, 2011
Provisional Application 61636005 · Apr 20, 2012
Related Publication 20160327760A1 · Nov 10, 2016