Output driver having pull-down capability

1. An output driver, comprising:

a switching device having a first node coupled to a gate of a power switch and pulling down a voltage level of the gate of the power switch to prevent a premature turn-on of the power switch; and

a pull-down circuit coupled to the switching device and controlling the switching device to prevent the premature turn-on of the power switch,

wherein the switching device includes a depletion type n-channel metal-oxide-semiconductor field-effect transistor having a drain coupled to the first node.

2. The output driver of claim 1 ,

wherein the pull-down circuit turns off the switching device when the power switch is in or transitions to a power-on mode.

3. The output driver of claim 2 , wherein the pull-down circuit includes:

a control circuit generating an activation signal based on a supply voltage, a first reference voltage, and a feedback signal; and

a negative charge pump generating a control signal according to the activation signal and outputting the control signal to the switching device.

4. The output driver of claim 3 , wherein the feedback signal is the control signal, and

wherein the control circuit includes:

a first comparator comparing the supply voltage and the first reference voltage to output a first input signal;

a second comparator comparing the feedback signal with a second reference voltage to output a second input signal; and

a logic gate performing a logical operation on the first and second input signals to output the activation signal.

5. The output driver of claim 4 , wherein the power switch is in a power-off mode when the supply voltage is less than the first reference voltage and the power switch is in an intermediate mode at a time interval between the power-off mode and the power-on mode, and

wherein preventing the premature turn-on of the power switch by the switching device involves keeping the power switch off during the power-off mode and the intermediate mode.

6. The output driver of claim 5 , wherein the logic gate is an AND logic gate, and wherein the logic gate outputs the activation signal indicative of a logic high value while the power switch is in the intermediate mode, and outputs the activation signal indicative of a logic low value while the power switch is in the power-off mode or the power-on mode.

7. The output driver of claim 3 , wherein the switching device is a first switching device, and

wherein the control circuit includes:

a first comparator comparing the supply voltage and the first reference voltage to output a first input signal;

a second switching device coupled between a second node and a ground and receiving the feedback signal, a voltage at the second node corresponding to a second input signal;

a resistor coupled between the supply voltage and the second node; and

a logic gate performing a logical operation on an inverted version of the first input signal and the second input signal to output the activation signal.

8. The output driver of claim 7 , wherein the power switch is in a power-off mode when the supply voltage is less than the first reference voltage and the power switch is in an intermediate mode at a time interval between the power-off mode and the power-on mode, and

wherein the logic gate outputs the activation signal indicative of a logic low value while the power switch is in the intermediate mode, and outputs the activation signal indicative of a logic high value while the power switch is in the power-off mode or the power-on mode.

9. The output driver of claim 7 , wherein the negative charge pump causes an absolute magnitude of the control signal to be substantially two times as large as an absolute magnitude of the feedback signal at the end of the intermediate mode.

10. The output driver of claim 9 , wherein the second switching device is a depletion type n-channel metal-oxide-semiconductor field-effect transistor.

11. The output driver of claim 9 , wherein the negative charge pump includes:

an oscillator coupled to the logic gate and generating an oscillating signal;

a first capacitor coupled to the oscillator;

a first diode coupled between the first capacitor and the ground;

a second diode coupled between the first capacitor and a third node, the third node being coupled to a gate of the second switching device;

a second capacitor coupled to the second diode;

a third diode coupled between the second capacitor and the third node;

a third capacitor coupled between the third node and the ground;

a fourth capacitor coupled between a fourth node and the ground, a voltage at the fourth node corresponding to the control signal; and

a fourth diode coupled between the second capacitor and the fourth node.

12. The output driver of claim 3 , wherein the control signal is a control voltage, and

wherein the negative charge pump decreases the control voltage until the control voltage becomes substantially equal to a threshold voltage of the switching device.

13. The output driver of claim 3 , wherein the output driver is included in a controller, the controller being in a package.

14. The output driver of claim 1 , wherein the pull-down circuit includes a charge pump generating a control voltage in response to an activation signal and outputting the control voltage to the switching device.

15. An apparatus, comprising:

a controller; and

an output driver including

a switching device having a first node coupled to a gate of a power switch and pulling down a voltage level of the gate of the power switch to prevent a premature turn-on of the power switch, and

a pull-down circuit coupled to the switching device and controlling the switching device to prevent the premature turn-on of the power switch,

wherein the pull-down circuit includes:

a control circuit generating an activation signal based on a supply voltage, a first reference voltage, and a feedback signal; and

a negative charge pump generating a control signal according to the activation signal and outputting the control signal to the switching device.

16. A method for controlling an output driver, the method comprising:

pulling down a level of a voltage at a first node to prevent a premature turn-on of a power switch coupled to the output driver, the first node being coupled to a switching device and a gate of the power switch;

controlling the switching device using a pull-down circuit; and

outputting a driving signal to the power switch,

wherein controlling the switching device comprises:

generating an activation signal based on a supply voltage, a first reference voltage, and a feedback signal; and

generating a control signal according to the activation signal and outputting the control signal to the switching device.

17. The method of claim 16 , further comprising:

increasing a level of the supply voltage until the level of the supply voltage becomes substantially equal to a level of the first reference voltage while the power switch is in a power-off mode.

18. The method of claim 16 , wherein the feedback signal is the control signal, the method further comprising:

comparing the supply voltage and the first reference voltage to output a first input signal;

comparing the feedback signal with a second reference voltage to output a second input signal; and

performing a logical operation on the first and second input signals to output the activation signal.

19. The method of claim 16 , wherein the switching device is a first switching device, the method further comprising:

comparing the supply voltage and the first reference voltage to output a first input signal;

generating a second input signal using a second switching device according to the feedback signal; and

performing a logical operation on an inverted version of the first signal and the second input signal to output the activation signal.

20. The method of claim 19 , wherein the power switch is in a power-off mode when the supply voltage is less than the first reference voltage and the power switch is in an intermediate mode at a time interval between the power-off mode and the power-on mode, the method further comprising:

causing an absolute magnitude of the control signal to be substantially two times as large as an absolute magnitude of the feedback signal at the end of the intermediate mode.