Semiconductor device, display panel, and electronic device
View Patent ↗A semiconductor device having a novel structure is provided. Fluctuation in the grayscale voltage due to an offset voltage is suppressed. When a current corresponding to a lower-bit grayscale voltage is generated in a transconductance amplifier, voltages V HI and V LO supplied to the transconductance amplifier are alternately input to two input terminals in accordance with a digital signal of the most significant bit of lower bits. Since a change corresponding to the offset voltage is added to both the maximum and minimum values of the current output from the transconductance amplifier, fluctuation in the grayscale voltage due to the offset voltage can be suppressed.
1. A semiconductor device comprising:
a first digital-to-analog converter circuit;
a first differential amplifier circuit;
a second differential amplifier circuit;
a current-voltage converter circuit; and
a switching circuit,
wherein the first digital-to-analog converter circuit is configured to generate a first voltage and a second voltage on the basis of an upper (N−M)-bit digital signal in which N is a natural number of 2 or more and M is a natural number smaller than N,
wherein the first differential amplifier circuit is configured to generate a first current corresponding to a difference between the first voltage and the second voltage on the basis of a current flowing in a first current source,
wherein the second differential amplifier circuit is configured to generate a second current corresponding to a difference between the first voltage and an output voltage of the semiconductor device on the basis of a current flowing in a second current source,
wherein the current-voltage converter circuit is configured to generate the output voltage of the semiconductor device on the basis of a current that is a sum of the first current and the second current,
wherein the first differential amplifier circuit comprises a first input terminal and a second input terminal,
wherein the switching circuit is configured to switch between a first state in which the first voltage is supplied to the first input terminal and the second voltage is supplied to the second input terminal, and a second state in which the first voltage is supplied to the second input terminal and the second voltage is supplied to the first input terminal, and
wherein the switching circuit is configured to switch between the first state and the second state in accordance with an M-bit digital signal.
2. The semiconductor device according to claim 1 , wherein the first digital-to-analog converter circuit comprises resistors connected in series and a pass transistor logic to which the (N−M)-bit digital signal is supplied.
3. The semiconductor device according to claim 1 , wherein the first differential amplifier circuit and the second differential amplifier circuit are transconductance amplifiers.
4. The semiconductor device according to claim 1 ,
wherein the first current source comprises resistors connected in series and a pass transistor logic to which the M-bit digital signal is supplied, and
wherein a current is generated on the basis of a voltage value selected in the pass transistor logic.
5. A display device comprising:
a source driver;
a gate driver; and
a display portion operatively connected to the source driver and the gate driver,
wherein the source driver comprises:
a digital circuit portion comprising a shift register and configured to generate a sampling pulse;
a digital-to-analog converter circuit comprising the semiconductor device according to claim 1 ; and
an output circuit portion comprising a buffer and configured to receive an output signal of the semiconductor device.
6. An electronic device comprising:
the display device according to claim 5 ; and
an operation button.
7. A semiconductor device to be input with an N-bit digital signal (N is a natural number of 2 or more), the semiconductor device comprising:
a first differential amplifier circuit comprising a first input terminal and a second input terminal;
a first digital-to-analog converter circuit comprising a first output terminal and a second output terminal; and
a switching circuit comprising:
a first input terminal electrically connected to the first output terminal of the first digital-to-analog converter circuit;
a second input terminal electrically connected to the second output terminal of the first digital-to-analog converter circuit;
a first output terminal electrically connected to the first input terminal of the first differential amplifier circuit; and
a second output terminal electrically connected to the second input terminal of the first differential amplifier circuit,
wherein the switching circuit is configured to change electrical connections between the first and second input terminals of the first differential amplifier circuit and the first and second output terminals of the first digital-to-analog converter circuit in accordance with a one-bit digital signal in the N-bit digital signal.
8. The semiconductor device according to claim 7 ,
wherein the switching circuit comprises:
a first switch between the first input terminal of the switching circuit and the first output terminal of the switching circuit;
a second switch between the first input terminal of the switching circuit and the second output terminal of the switching circuit;
a third switch between the second input terminal of the switching circuit and the first output terminal of the switching circuit, and
a fourth switch between the second input terminal of the switching circuit and the second output terminal of the switching circuit, and
wherein the first switch and the fourth switch are configured to be controlled by the one-bit digital signal and the second switch and the third switch are configured to be controlled by an inverted signal of the one-bit digital signal.
9. The semiconductor device according to claim 7 ,
wherein the first differential amplifier circuit comprises:
a first transistor comprising a gate electrically connected to the first output terminal of the switching circuit; and
a second transistor comprising a gate electrically connected to the second output terminal of the switching circuit.
10. The semiconductor device according to claim 7 , wherein the first differential amplifier circuit is a transconductance amplifier.
11. The semiconductor device according to claim 10 ,
wherein the transconductance amplifier comprises:
a first n-channel transistor and a first p-channel transistor each comprising a gate electrically connected to the first output terminal of the switching circuit; and
a second n-channel transistor and a second p-channel transistor each comprising a gate electrically connected to the second output terminal of the switching circuit.
12. The semiconductor device according to claim 7 ,
wherein the first digital-to-analog converter circuit comprises:
a voltage generation circuit;
a first pass transistor logic comprising a first plurality of transistors and configured to control an electrical connection between the voltage generation circuit and the first output terminal of the first digital-to-analog converter circuit; and
a second pass transistor logic comprising a second plurality of transistors and configured to control an electrical connection between the voltage generation circuit and the second output terminal of the first digital-to-analog converter circuit.
13. The semiconductor device according to claim 12 , wherein the first pass transistor logic and the second pass transistor logic are each configured to be input with an upper (N−M)-bit digital signal (M is a natural number smaller than N) in the N-bit digital signal to control the electrical connection between the voltage generation circuit and the first output terminal of the first digital-to-analog converter circuit and the electrical connection between the voltage generation circuit and the second output terminal of the first digital-to-analog converter circuit.
14. The semiconductor device according to claim 12 , comprising a first current source operatively connected to the first differential amplifier circuit and configure to supply a current flowing in the first differential amplifier circuit.
15. The semiconductor device according to claim 14 , wherein the first current source is configured to generate the current on the basis of a lower M-bit digital signal input to the first current source.
16. A display device comprising:
a source driver;
a gate driver; and
a display portion operatively connected to the source driver and the gate driver,
wherein the source driver comprises:
a digital circuit portion comprising a shift register and configured to generate a sampling pulse;
a digital-to-analog converter circuit comprising the semiconductor device according to claim 7 ; and
an output circuit portion comprising a buffer and configured to receive an output signal of the semiconductor device.
17. An electronic device comprising:
the display device according to claim 16 ; and
an operation button.
18. A semiconductor device comprising:
a first differential amplifier circuit comprising a first input terminal and a second input terminal;
a first digital-to-analog converter circuit comprising a first output terminal and a second output terminal; and
a switching circuit comprising:
a first input terminal electrically connected to the first output terminal of the first digital-to-analog converter circuit;
a second input terminal electrically connected to the second output terminal of the first digital-to-analog converter circuit;
a first output terminal electrically connected to the first input terminal of the first differential amplifier circuit; and
a second output terminal electrically connected to the second input terminal of the first differential amplifier circuit,
wherein the switching circuit is configured to change electrical connections between the first and second input terminals of the first differential amplifier circuit and the first and second output terminals of the first digital-to-analog converter circuit.
19. The semiconductor device according to claim 18 ,
wherein the switching circuit comprises:
a first switch between the first input terminal of the switching circuit and the first output terminal of the switching circuit;
a second switch between the first input terminal of the switching circuit and the second output terminal of the switching circuit;
a third switch between the second input terminal of the switching circuit and the first output terminal of the switching circuit, and
a fourth switch between the second input terminal of the switching circuit and the second output terminal of the switching circuit.
20. The semiconductor device according to claim 18 ,
wherein the first differential amplifier circuit comprises:
a first transistor comprising a gate electrically connected to the first output terminal of the switching circuit; and
a second transistor comprising a gate electrically connected to the second output terminal of the switching circuit.
21. The semiconductor device according to claim 18 , wherein the first differential amplifier circuit is a transconductance amplifier.
22. The semiconductor device according to claim 21 ,
wherein the transconductance amplifier comprises:
a first n-channel transistor and a first p-channel transistor each comprising a gate electrically connected to the first output terminal of the switching circuit; and
a second n-channel transistor and a second p-channel transistor each comprising a gate electrically connected to the second output terminal of the switching circuit.
23. The semiconductor device according to claim 18 ,
wherein the first digital-to-analog converter circuit comprises:
a voltage generation circuit;
a first pass transistor logic comprising a first plurality of transistors and configured to control an electrical connection between the voltage generation circuit and the first output terminal of the first digital-to-analog converter circuit; and
a second pass transistor logic comprising a second plurality of transistors and configured to control an electrical connection between the voltage generation circuit and the second output terminal of the first digital-to-analog converter circuit.
24. The semiconductor device according to claim 23 , wherein the first pass transistor logic and the second pass transistor logic are each configured to be input with an upper (N−M)-bit digital signal (N is a natural number of 2 or more; M is a natural number smaller than N) in an N-bit digital signal to control the electrical connection between the voltage generation circuit and the first output terminal of the first digital-to-analog converter circuit and the electrical connection between the voltage generation circuit and the second output terminal of the first digital-to-analog converter circuit.
25. The semiconductor device according to claim 23 , comprising a first current source operatively connected to the first differential amplifier circuit and configure to supply a current flowing in the first differential amplifier circuit.
26. The semiconductor device according to claim 25 , wherein the first current source is configured to generate the current on the basis of a lower M-bit digital signal input to the first current source.
27. A display device comprising:
a source driver;
a gate driver; and
a display portion operatively connected to the source driver and the gate driver,
wherein the source driver comprises:
a digital circuit portion comprising a shift register and configured to generate a sampling pulse;
a digital-to-analog converter circuit comprising the semiconductor device according to claim 18 ; and
an output circuit portion comprising a buffer and configured to receive an output signal of the semiconductor device.
28. An electronic device comprising:
the display device according to claim 27 ; and
an operation button.