IP Library Granted Patent US 9,947,621
Granted Patent B2
US 9,947,621 · App. 15/229,783 · Granted Apr 17, 2018

Structure and method to reduce copper loss during metal cap formation

Inventors: Praneet Adusumilli (Albany, NY); Alexander Reznicek (Troy, NY); Oscar van der Straten (Guilderland Center, NY)
Assignee: International Business Machines Corporation
H01L23/53228H01L21/283H01L21/2855H01L21/2885H01L21/32115H01L21/76858H01L21/76859H01L21/76871H01L23/5226H01L23/532H01L23/53204H01L23/53209H01L23/53266
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Quick Facts
Patent No.
US 9,947,621
App. No.
15/229,783
Granted
Apr 17, 2018
Kind
B2
Abstract

A copper or copper alloy is formed in a reflow enhancement layer lined opening present in an interconnect dielectric material layer. A ruthenium (Ru) or osmium (Os) doped copper or copper alloy cap is then formed via ion implantation and annealing in an upper portion of a copper or copper alloy present in the opening. The upper portion of the copper or copper alloy containing the ruthenium (Ru) or osmium (Os) doped copper or copper alloy cap can mitigate or even present prevent preferential loss of copper which can aid in lowering the interconnect resistance of the structure.

Claims (15)

1. A semiconductor structure comprising:

an interconnect dielectric material layer containing an opening and located on a surface of a substrate, wherein said opening contains a continuous diffusion barrier liner lining said opening, a continuous reflow enhancement liner on said diffusion barrier liner, and an interconnect structure filling a remaining volume of said opening, said interconnect structure comprising, from bottom to top, a copper or copper alloy and a ruthenium (Ru) or osmium (Os) doped copper or copper alloy cap, said ruthenium (Ru) or osmium (Os) doped copper or copper alloy cap having a topmost surface that is coplanar with a topmost surface of said interconnect dielectric material layer.

2. The semiconductor structure of claim 1 , wherein said continuous reflow enhancement liner and said ruthenium (Ru) or osmium (Os) doped copper or copper alloy cap both comprise ruthenium (Ru).

3. The semiconductor structure of claim 1 , wherein said continuous reflow enhancement liner and said ruthenium (Ru) or osmium (Os) doped copper or copper alloy cap both comprise osmium (Os).

4. The semiconductor structure of claim 1 , wherein said Ru or Os doped copper or copper alloy cap has a graded Ru or Os concentration which decreases from a topmost surface of said Ru or Os doped copper or copper alloy cap to a bottommost surface of said Ru or Os doped copper or copper alloy cap.

5. The semiconductor structure of claim 1 , wherein said Ru or Os doped copper or copper alloy cap has a constant Ru or Os concentration from a topmost surface of said Ru or Os doped copper or copper alloy cap to a bottommost surface of said Ru or Os doped copper or copper alloy cap.

6. The semiconductor structure of claim 1 wherein a topmost surface of each of said continuous diffusion barrier liner and said continuous reflow enhancement liner is coplanar with said topmost surface of said Ru or Os doped copper or copper alloy cap and said topmost surface of said interconnect dielectric material layer.

7. The semiconductor structure of claim 1 , wherein said Ru or Os doped copper or copper alloy cap is present on an entire topmost surface of said copper or copper alloy.

8. The semiconductor structure of claim 1 , wherein said Ru or Os doped copper or copper alloy cap mitigates galvanic corrosion of said copper or copper alloy.

9. The semiconductor structure of claim 1 , wherein said copper or copper alloy is present without voids.

10. The semiconductor structure of claim 1 , wherein said opening extends entirely through said interconnect dielectric material layer and contacts a surface of said substrate.

11. A semiconductor structure comprising:

an interconnect dielectric material layer containing an opening and located on a surface of a substrate, wherein said opening contains a continuous diffusion barrier liner lining said opening, a continuous reflow enhancement liner comprising osmium (Os) on said diffusion barrier liner, and an interconnect structure filling a remaining volume of said opening, said interconnect structure comprising, from bottom to top, a copper or copper alloy, and an osmium (Os) doped copper or copper alloy cap, said osmium (Os) doped copper or copper alloy cap having a topmost surface that is coplanar with a topmost surface of said interconnect dielectric material layer.

12. A semiconductor structure comprising:

an interconnect dielectric material layer containing an opening and located on a surface of a substrate, wherein said opening contains a continuous diffusion barrier liner lining said opening, a continuous reflow enhancement liner on said diffusion barrier liner, and an interconnect structure filling a remaining volume of said opening, said interconnect structure comprising, from bottom to top, a copper or copper alloy, and a ruthenium (Ru) or osmium (Os) doped copper or copper alloy cap, said ruthenium (Ru) or osmium (Os) doped copper or copper alloy cap having a topmost surface that is coplanar with a topmost surface of said interconnect dielectric material layer, wherein said Ru or Os doped copper or copper alloy cap has a graded Ru or Os concentration which decreases from a topmost surface of said Ru or Os doped copper or copper alloy cap to a bottommost surface of said Ru or Os doped copper or copper alloy cap.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 13, 2020
From: INTERNATIONAL BUSINESS MACHINES CORPORATION
To: ELPIS TECHNOLOGIES INC.
Reel/Frame 052644/0868 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 5, 2016
From: ADUSUMILLI, PRANEET; REZNICEK, ALEXANDER; VAN DER STRATEN, OSCAR
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 039599/0856 →
Continuity (1)
Related Publication 20180040507A1 · Feb 8, 2018