Quad flat no leads package with locking feature
Implementations of semiconductor packages may include: a lead frame having at least one corner lead, the at least one corner lead positioned where two edges of the package meet, and the at least one lead having a half etch on a first portion of the lead and a half etch on a second portion of the lead. The first portion may extend internally into the package to create a mechanical mold compound lock between a mold compound of the package and the lead. The second portion may be located on at least one of the two edges of the package.
1. A semiconductor package comprising:
a lead frame comprising at least one corner lead, the at least one corner lead positioned where two outer edges of the package meet, and the at least one corner lead having a half etch on a first portion of the lead and a half etch on a second portion of the lead;
wherein the first portion extends internally into the package to create a mechanical mold compound lock between a mold compound of the package and the lead;
wherein the second portion is located on at least one of the two outer edges of the package;
wherein the second portion is a portion of the at least one corner lead that contacts a mounting surface of the semiconductor package; and
wherein the mounting surface extends to at least one of the two outer edges of the package.
2. The semiconductor of claim 1 , wherein the first portion is a portion of the at least one corner lead that does not contact a mounting surface of the semiconductor package.
3. The semiconductor of claim 1 , wherein the first portion of the lead is conFIG.d to have space for coupling a wire bond thereto.
4. The semiconductor of claim 1 , further comprising a second lead adjacent to the at least one corner lead where the second lead and the at least one corner lead have a lead pitch of at least 0.2 millimeters.
5. A semiconductor package comprising:
a lead frame comprising at least one lead that is located on an outer edge of the package, the at least one lead having a half etch on a first portion of the lead and a half etch on a second portion of the lead;
wherein the first portion extends internally into the package to create a mechanical mold compound lock between a mold compound and the lead;
wherein the second portion of the lead is located on the outer edge of the package;
wherein the second portion is a portion of the at least one lead that contacts a mounting surface of the semiconductor package; and
wherein the mounting surface extends to the outer edge of the package.
6. The semiconductor of claim 5 , wherein the first portion is a portion of the at least one lead that does not contact a mounting surface of the semiconductor package.
7. The semiconductor of claim 5 , wherein the first portion of the lead is configured to have space for coupling a wire bond thereto.
8. The semiconductor of claim 5 , further comprising a second lead adjacent to the at least one lead where the second lead and the at least one lead have a lead pitch of at least 0.2 millimeters.