IP Library Granted Patent US 9,793,186
Granted Patent B1
US 9,793,186 · App. 15/230,875 · Granted Oct 17, 2017

Semiconductor wafer and method of backside probe testing through opening in film frame

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Quick Facts
Patent No.
US 9,793,186
App. No.
15/230,875
Granted
Oct 17, 2017
Kind
B1
Abstract

A semiconductor test system has a film frame including a tape portion with one or more openings through the tape portion. The opening is disposed in a center region of the tape portion of the film frame. The film frame may have conductive traces formed on or through the tape portion. A thin semiconductor wafer includes a conductive layer formed over a surface of the semiconductor wafer. The semiconductor wafer is mounted over the opening in the tape portion of the film frame. A wafer probe chuck includes a lower surface and raised surface. The film frame is mounted to the wafer probe chuck with the raised surface extending through the opening in the tape portion to contact the conductive layer of the semiconductor wafer. The semiconductor wafer is probe tested through the opening in the tape portion of the film frame.

Claims (42)

1. A method of making a semiconductor device, comprising:

providing a semiconductor wafer;

providing a film frame including a tape portion with an opening through the tape portion;

mounting the semiconductor wafer over the opening in the tape portion of the film frame; and

probe testing the semiconductor wafer through the opening in the tape portion of the film frame.

2. The method of claim 1 , wherein the opening is disposed in a center region of the tape portion of the film frame.

3. The method of claim 1 , further including:

providing a wafer probe chuck including a raised surface; and

mounting the film frame to the wafer probe chuck with the raised surface extending through the opening in the tape portion to contact the semiconductor wafer.

4. The method of claim 1 , further including:

providing a plurality of openings through the tape portion of the film frame; and

probe testing of the semiconductor wafer through the openings in the tape portion of the film frame.

5. The method of claim 1 , further including:

forming a conductive layer over a surface of the semiconductor wafer; and

probe testing the conductive layer through the opening in the tape portion of the film frame.

6. The method of claim 1 , further including removing a portion of a base material of the semiconductor wafer to reduce a thickness of the semiconductor wafer.

7. A method of making a semiconductor device, comprising:

providing a carrier with an opening through the carrier;

mounting a semiconductor wafer over the opening in the carrier, wherein the opening is disposed in a center region of the carrier; and

probe testing the semiconductor wafer through the opening in the carrier.

8. A method of making a semiconductor device, comprising:

providing a carrier with an opening through the carrier;

mounting a semiconductor wafer over the opening in the carrier;

providing a wafer probe chuck including a raised surface;

mounting the carrier to the wafer probe chuck with the raised surface extending through the opening in the carrier to contact the semiconductor wafer; and

probe testing the semiconductor wafer through the opening in the carrier.

9. The method of claim 7 , further including:

providing a plurality of openings through the carrier; and

probe testing of the semiconductor wafer through the openings in the carrier.

10. The method of claim 7 , further including:

forming a conductive layer over a surface of the semiconductor wafer; and

probe testing the conductive layer through the opening in the carrier.

11. The method of claim 7 , further including removing a portion of a base material of the semiconductor wafer to reduce a thickness of the semiconductor wafer.

12. The method of claim 7 , further including forming a conductive trace in or on the carrier.

13. An apparatus for probe testing a semiconductor wafer, comprising:

a carrier with an opening through the carrier, wherein the opening is disposed in a center region of the carrier; and

a semiconductor wafer disposed over the opening in the carrier, wherein the semiconductor wafer is probe tested through the opening in the carrier.

14. The apparatus of claim 13 , further including a wafer probe chuck including a raised surface, wherein the carrier is mounted to the wafer probe chuck with the raised surface extending through the opening in the carrier to contact the semiconductor wafer.

15. The apparatus of claim 13 , further including a plurality of openings through the carrier, wherein the semiconductor wafer is probe tested through the openings in the carrier.

16. The apparatus of claim 13 , further including a conductive layer over a surface of the semiconductor wafer, wherein the conductive layer is probe tested through the opening in the carrier.

17. The apparatus of claim 13 , wherein a thickness of the semiconductor wafer is less than 75 micrometers.

18. The apparatus of claim 13 , further including a conductive trace formed in or on the carrier.

Assignments (3)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 041187, FRAME 0295 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064151/0203 →
SECURITY INTEREST Recorded Dec 23, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH
Reel/Frame 041187/0295 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 8, 2016
From: SEDDON, MICHAEL J.; LEE, HENG CHEN
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 039369/0715 →