IP Library Granted Patent US 10,217,676
Granted Patent B2
US 10,217,676 · App. 15/233,914 · Granted Feb 26, 2019

Method and apparatus for manufacturing a semiconductor device including a plurality of semiconductor chips connected with bumps

Inventors: Shinya Fukayama (Nagoya Aichi, JP); Naoyuki Komuta (Oita Oita, JP); Hiroshi Watabe (Yokkaichi Mie, JP)
Assignee: TOSHIBA MEMORY CORPORATION
H01L22/12H01L22/20H01L24/81H01L25/50H01L2224/81908H01L2225/06513
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Quick Facts
Patent No.
US 10,217,676
App. No.
15/233,914
Granted
Feb 26, 2019
Kind
B2
Abstract

A method for manufacturing a semiconductor device including a plurality of semiconductor chips includes steps of placing, on a first semiconductor chip, a second semiconductor chip, such that a plurality of bumps is located between the first semiconductor chip and the second semiconductor chip, determining a distance between the first semiconductor chip and the second semiconductor chip, and determining whether or not the distance is within a predetermined range and stopping placement of additional chips if the distance is determined to be outside the predetermined range.

Claims (29)

1. A method for manufacturing a semiconductor device including a plurality of semiconductor chips, the method comprising:

placing, on a first semiconductor chip, a second semiconductor chip, such that a plurality of bumps is located between the first semiconductor chip and the second semiconductor chip;

after said placing, softening and then solidifying the plurality of bumps to bond the first semiconductor chip and the second semiconductor chip to each other;

measuring a position of a head for holding a semiconductor chip to be placed at least one of when the plurality of bumps is softened and when the plurality of bumps is solidified, while the head holds the second semiconductor chip;

determining a distance between the first semiconductor chip and the second semiconductor chip placed thereon, based on a position of the head when the first semiconductor chip is placed on a substrate by the head, the measured position of the head, and a thickness of the second semiconductor chip; and

determining whether or not the distance is within a predetermined range and stopping placement of additional chips if the distance is determined to be outside the predetermined range.

2. The method according to claim 1 , further comprising:

when the distance is determined to be within the predetermined range, placing, on the second semiconductor chip, a third semiconductor chip, such that a plurality of bumps is located between the second semiconductor chip and the third semiconductor chip.

3. The method according to claim 2 , further comprising:

when the distance is determined to be outside the predetermined range, generating an alert.

4. The method according to claim 1 , further comprising:

measuring the thickness of the second semiconductor chip before the second semiconductor chip is placed on the first semiconductor chip.

5. The method according to claim 1 , wherein

the thickness of the second semiconductor chip is stored in a storage device, and the stored thickness is retrieved for the determination of the distance.

6. A method for manufacturing a semiconductor device including a plurality of semiconductor chips, the method comprising:

placing, on a first semiconductor chip, a second semiconductor chip, such that a first plurality of bumps is located between the first semiconductor chip and the second semiconductor chip;

after said placing, measuring a position of a head for holding a semiconductor chip to be placed, when the head holds the second semiconductor chip placed on the first semiconductor chip;

determining a first distance between the first semiconductor chip and the second semiconductor chip placed thereon, based on a position of the head when the first semiconductor chip is placed on a substrate by the head, the measured position of the head, and a thickness of the second semiconductor chip;

determining whether or not the first distance is within a predetermined range;

when the first distance is determined to be within the predetermined range, placing, on the second semiconductor chip, a third semiconductor chip, such that a second plurality of bumps is located between the second semiconductor chip and the third semiconductor chip;

determining whether or not a second distance between the second semiconductor chip and the third semiconductor chip is within the predetermined range; and

when the second distance is determined to be within the predetermined range, softening and then solidifying both of the first and second plurality of bumps at once.

7. The method according to claim 6 , further comprising:

measuring the thickness of the second semiconductor chip before the second semiconductor chip is placed on the first semiconductor chip.

8. The method according to claim 6 , wherein

the thickness of the second semiconductor chip is stored in a storage device, and the stored thickness is retrieved for the determination of the first distance.

9. The method according to claim 6 , further comprising:

after the third semiconductor chip is placed on the second semiconductor chip, measuring the position of the head when the head holds the third semiconductor chip placed on the second semiconductor chip; and

determining the second distance based on the measured position of the head when the head holds the second semiconductor chip placed on the first semiconductor chip, the measured position of the head when the head holds the third semiconductor chip placed on the second semiconductor chip, and a thickness of the third semiconductor chip.

Assignments (5)
MERGER Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: K.K. PANGEA
Reel/Frame 055659/0471 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 055669/0001 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: K.K. PANGEA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 055669/0401 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2017
From: KABUSHIKI KAISHA TOSHIBA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 043194/0647 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 21, 2016
From: FUKAYAMA, SHINYA; KOMUTA, NAOYUKI; WATABE, HIROSHI
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 040093/0732 →
Priority Claims (1)
JP 2015-177482 · Sep 9, 2015 · national
Continuity (1)
Related Publication 20170069551A1 · Mar 9, 2017