IP Library Granted Patent US 10,341,590
Granted Patent B2
US 10,341,590 · App. 15/235,876 · Granted Jul 2, 2019

Methods and apparatus for a CCD image sensor

Inventors: Shen Wang (Pittsford, NY); Eric J. Meisenzahl (Ontario, NY); Eric G. Stevens (Webster, NY)
Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
H04N5/3591H01L27/14818H01L27/14887H04N5/372
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 10,341,590
App. No.
15/235,876
Granted
Jul 2, 2019
Kind
B2
Abstract

Various embodiments of the present technology may comprise methods and apparatus for a CCD image sensor. The image sensor may comprise a center channel disposed along a horizontal center line of the pixel array for collecting and transferring charge. The center channel is electrically coupled to a lateral overflow drain. In various embodiments, the image sensor may comprise a light shield under a gap between neighboring microlenses, such as a gap along the center line, to block light, such as to maintain a uniform, spatial sampling pattern across the device. In various embodiments, the image sensor may comprise a barrier region disposed between the center channel and the lateral overflow drain, for example to prevent charge from the lateral overflow drain being injected back into the center channel and adjacent pixels.

Claims (48)

1. A solid-state image sensor, comprising:

a substrate comprising:

a first substrate layer of a first impurity type;

a second substrate layer of a second impurity type disposed on a surface of the first substrate layer, the second substrate layer comprising:

a center channel arranged substantially along a horizontal center line of the substrate, wherein the center channel is substantially bounded by:

a first barrier region of the first impurity type adjacent to a first side of the horizontal center line, and

a second barrier region of the first impurity type adjacent to a second side of the horizontal center line; and

a plurality of photosensitive regions arranged in rows and columns; wherein the center channel is located between and separates two adjacent photosensitive regions from the plurality of photosensitive regions;

a drain region of the second impurity type adjacent to the center channel, wherein the center channel electrically couples to the drain region; and

a center gate disposed above the center channel.

2. The solid-state image sensor of claim 1 , further comprising a third barrier region disposed at least partially within the first substrate layer and adjacent to the drain region.

3. The solid-state image sensor of claim 1 , wherein the drain region is configured to have an electrostatic potential that is greater than an electrostatic potential of the center channel.

4. The solid-state image sensor of claim 1 , further comprising a light shield disposed above the center channel and the center gate.

5. The solid-state image sensor of claim 1 , further comprising a microlens array disposed above the photosensitive regions.

6. The solid-state image sensor of claim 5 , further comprising a light shield disposed below a gap within the microlens array.

7. The solid-state image sensor of claim 1 , further comprising a color filter array disposed above the plurality of photosensitive regions.

8. The solid-state image sensor of claim 1 , wherein the drain region is arranged vertically along the substrate, and wherein the drain region and the center channel are substantially perpendicular to each other.

9. A method for charge collection and distribution in a CCD sensor, comprising:

applying a first voltage to a center gate disposed above a center channel, wherein the first voltage creates a first electrostatic potential, and wherein the center channel is:

disposed along a center line of a pixel array; and

located between and separates two adjacent photosensitive regions;

applying a second voltage to a drain region, wherein the second voltage creates a second electrostatic potential, wherein the drain region is electrically coupled to the center channel, and wherein the first electrostatic potential is less than the second electrostatic potential;

collecting charge at the center channel, wherein the center channel is bounded by opposing barrier regions comprising:

a first barrier region disposed at least partially within a top surface of a first substrate layer, and

a second barrier region disposed at least partially within the top surface of the first substrate layer; and

draining the charge collected at the center channel into the drain region.

10. The method of claim 9 , wherein the drain region and the center channel are substantially perpendicular to each other.

11. The method of claim 9 , further comprising alternately applying two different voltages to the center gate, the voltages selected from: the first voltage, a third voltage, and a fourth voltage.

12. The method of claim 11 , wherein the center channel further comprises a third barrier region disposed between the center channel and the drain region.

13. An imaging system, comprising:

a memory device;

a processor coupled to the memory device; and

an image sensor coupled to the processor, the image sensor comprising:

a lateral overflow drain;

an active pixel array comprising a plurality of photosensitive regions arranged in rows and columns;

a center channel disposed along a region of the active pixel array substantially equidistant from two opposing edges of the active pixel array, wherein the center channel is located between and separates two adjacent photosensitive regions;

a center gate disposed above the center channel;

a first barrier disposed on a first side of the center channel;

a second barrier disposed on a second side of the center channel;

wherein the first and second barrier are disposed on opposing sides of the center channel; and

wherein the center channel is coupled to the lateral overflow drain.

14. The imaging system of claim 13 , further comprising a third barrier region disposed at least partially within a top surface of a first substrate layer and adjacent to the lateral overflow drain.

15. The imaging system of claim 13 , further comprising a light shield disposed above the center channel and the center gate.

16. The imaging system of claim 15 , further comprising a microlens array disposed above the photosensitive regions.

17. The imaging system of claim 16 , further comprising a light shield disposed below a gap within the microlens array.

18. The imaging system of claim 13 , wherein the lateral overflow drain and the center channel are substantially perpendicular to each other.

19. The imaging system of claim 13 , further comprising a color filter array disposed above the photosensitive regions.

20. The imaging system of claim 13 , wherein the lateral overflow drain is configured to have an electrostatic potential that is greater than an electrostatic potential of the center channel.

Assignments (3)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 041187, FRAME 0295 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064151/0203 →
SECURITY INTEREST Recorded Dec 23, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH
Reel/Frame 041187/0295 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 12, 2016
From: WANG, SHEN; MEISENZAHL, ERIC J.; STEVENS, ERIC G.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 039422/0849 →
Continuity (1)
Related Publication 20180048835A1 · Feb 15, 2018