IP Library Granted Patent US 12,236,263
Granted Patent B2
US 12,236,263 · App. 15/236,148 · Granted Feb 25, 2025

Scheduling computation tasks for execution by multiple processing units using computation task profiling

Inventors: Stephen John Clohset (San Francisco, CA); James Alexander McCombe (San Francisco, CA); Luke Tilman Peterson (Oakland, CA)
Assignee: Imagination Technologies Limited
G06F9/4881G06F9/5016G06F40/169G06T15/005G06T15/06G06T2200/28G06T2210/52
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Quick Facts
Patent No.
US 12,236,263
App. No.
15/236,148
Granted
Feb 25, 2025
Kind
B2
Abstract

In some aspects, finer grained parallelism is achieved by segmenting programmatic workloads into smaller discretized portions, where a first element can be indicative both of a configuration or program to be executed, and a first data set to be used in such execution, while a second element can be indicative of a second data element or group. The discretized portions can cause program execute on distributed processors. Approaches to selecting processors, and allocating local memory associated with those processors are disclosed. In one example, discretized portions that share a program have an anti-affinity to cause dispersion, for initial execution assignment. Flags, such as programmer and compiler generated flags can be used in determining such allocations. Workloads can be grouped according to compatibility of memory usage requirements.

Claims (39)

1. A machine-implemented method of scheduling computation tasks, each computation task defining a graphic rendering process, comprising:

identifying, by a processor, a set of computation tasks to be executed on a plurality of processing units;

profiling, by the processor, the computation tasks of the set according to parameters comprising memory access requirements and computation requirements of the computation tasks;

forming, by the processor, instances of the computation tasks into at least one group by using said profiling of the computation tasks to identify computation tasks to be grouped together on the basis that they have memory access requirements and computation requirements that enable them to be executed in a group, wherein forming the instances of the computation tasks into at least one group is performed prior to scheduling the at least one group for execution, and wherein forming the instances of the computation tasks into at least one group is performed without allocating processing resources to service the at least one group;

scheduling, by the processor, subsequently to forming the at least one group of instances of the computation tasks, said at least one group to be executed on the plurality of processing units;

subsequent to scheduling the at least one group for execution, obtaining an allocation of processing resources to service the at least one group; and

executing the scheduled at least one group of instances of computation tasks using the allocated processing resources within the plurality of processing units.

2. The machine-implemented method of claim 1 , wherein the grouping comprises identifying a group of instances of computation tasks having a collective data access pattern conforming to a specified concurrent computation profile.

3. The machine-implemented method of claim 1 , further comprising estimating amounts of further computation that will be created for scheduling, as a result of executing instances of the one or more elements of program code; and scheduling the instances for execution using the estimated amounts of further computation and a scheduling objective.

4. The machine-implemented method of claim 3 , wherein the scheduling objective relates to progress in rendering a sequence of 2-D images from 3-D scene data, and the scheduling comprises using the estimated amounts of further computation in scheduling inter-frame processing tasks.

5. The machine-implemented method of claim 4 , wherein inter-frame processing tasks comprise building an acceleration structure and performing vertex transformations on the 3-D scene data.

6. The machine-implemented method of claim 3 , wherein the identified computation tasks comprise computation tasks to be executed, and computation tasks that have begun execution.

7. The machine-implemented method of claim 1 , wherein the profiling comprises accessing a respective flag for different computation tasks of the set, and using the flags in determining the memory access requirements and computation requirements for the computation tasks of the set.

8. The machine-implemented method of claim 1 , wherein a grouping of computation tasks is formed using a target memory utilization.

9. The machine-implemented method of claim 1 , wherein the instances of the computation tasks forming each group are scheduled to be executed concurrently on the plurality of processing units.

10. A non-transitory machine-readable medium storing thereon machine-executable instructions that when executed cause at least one processor to:

identify a set of computation tasks to be executed on a plurality of processing units, each computation task defining a graphics rendering process;

profile the computation tasks of the set according to parameters comprising memory access requirements and computation requirements of the computation tasks;

form instances of the computation tasks into at least one group by using said profiling of the computation tasks to identify computation tasks to be grouped together on the basis that they have memory access requirements and computation requirements that enable them to be executed in a group, wherein forming the instances of the computation tasks into at least one group is performed prior to scheduling the at least one group for execution, and wherein forming the instances of the computation tasks into at least one group is performed without allocating processing resources to service the at least one group;

schedule, subsequently to forming the at least one group of instances of the computation tasks, said at least one group to be executed on the plurality of processing units;

subsequent to scheduling the at least one group for execution, obtain an allocation of processing resources to service the at least one group; and

execute the scheduled at least one group of instances of computation tasks on the allocated processing resources within the plurality of processing units.

11. A processor for graphics rendering, comprising

a scheduler configured to:

identify a set of computation tasks to be executed on the processing units;

profile the computation tasks of the set according to parameters comprising memory access requirements and computation requirements of the computation tasks;

form instances of the computation tasks into at least one group by using said profiling of the computation tasks to identify computation tasks to be grouped together on the basis that they have memory access requirements and computation requirements that enable them to be executed in a group, wherein forming the instances of the computation tasks into at least one group is performed prior to scheduling the at least one group for execution, and wherein forming the instances of the computation tasks into at least one group is performed without allocating processing resources to service the at least one group;

schedule, subsequently to forming the at least one group of instances of the computation tasks, said at least one group to be executed on the plurality of processing units;

subsequent to scheduling the at least one group for execution, obtain an allocation of processing resources to service the at least one group; and

a plurality of processing units configured to execute the scheduled at least one group of instances of computation tasks using the allocated processing resources.

12. The processor of claim 11 , further comprising a plurality of local memories used by the plurality of processing units for storing data associated with computation tasks to be executed on the plurality of processing units.

13. The processor of claim 12 , wherein there is a one-to-one correspondence between the plurality of local memories and the plurality of processing units.

14. The processor of claim 12 , wherein the scheduler is further configured to identify which, if any, of the processing units of the plurality has, in an associated local memory, data associated with a computation task to be executed, and to group that computation task into a group for execution by one of those identified processing units.

15. The processor of claim 11 , further comprising memory, wherein the scheduler is configured to group the instances of the computation tasks for execution into groups based on a target for memory usage.

16. The processor of claim 11 , wherein the scheduler is configured to group the instances of the computation tasks for execution into groups in accordance with priorities based on indications of the number of further instances of computation tasks which are likely to result from the execution of the instances of computation tasks.

17. The processor of claim 11 , wherein the scheduler is configured to group the instances of the computation tasks for execution into groups by identifying a group of instances of computation tasks having a collective data access pattern conforming to a specified concurrent computation profile.

18. The processor of claim 11 , wherein the scheduler is configured to group the instances of the computation tasks for execution into groups such that a grouping of computation tasks includes a computation task that is memory access bounded and a computation task that is compute bounded.

19. The processor of claim 11 , wherein the scheduler comprises a flag storage for storing flags for computation tasks, and wherein the scheduler is configured to profile the computation tasks by accessing a respective flag from the flag storage for different computation tasks of the set, and using the flags in determining the memory access requirements and computation requirements for the computation tasks of the set.

20. The processor of claim 11 , wherein the scheduler is configured to group the instances of the computation tasks for execution into groups by grouping identifiers of the instances of the computation tasks.

Assignments (1)
SECURITY INTEREST Recorded Jul 31, 2024
From: IMAGINATION TECHNOLOGIES LIMITED
To: FORTRESS INVESTMENT GROUP (UK) LTD
Reel/Frame 068221/0001 →
Continuity (5)
Continuation 13368616 · Feb 8, 2012
Provisional Application 61535487 · Sep 16, 2011
Provisional Application 61515824 · Aug 5, 2011
Provisional Application 61497915 · Jun 16, 2011
Related Publication 20160350154A1 · Dec 1, 2016
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