Dense vertical nanosheet

1. A method of forming a semiconductor structure comprising:

forming a sacrificial mandrel extending upwards from a substrate;

forming alternating channel layer portions and sacrificial layer portions on sidewalls of the sacrificial mandrel, wherein the alternating channel layer portions and sacrificial layer portions are arranged side-by-side and extend in an upward direction away from the substrate;

wherein the alternating channel layer portions and sacrificial layer portions also contact sidewalls of a hard mask cap that is located atop the sacrificial mandrel;

wherein the forming the sacrificial mandrel comprises:

forming a hard mask layer on a semiconductor substrate;

patterning the hard mask layer to form the hard mask cap; and

patterning an upper portion of the semiconductor substrate using the hard mask cap as an etch mask to provide the sacrificial mandrel;

removing the sacrificial mandrel; and

removing the sacrificial layer portions, while maintaining the channel layer portions extending upwards in the upward direction away from the substrate.

2. The method of claim 1 , wherein each of the channel layer portions has a thickness ranging from 2 nm to 10 nm, and each of the sacrificial layer portions has a thickness ranging from 5 nm to 30 nm.

3. The method of claim 1 , wherein the semiconductor substrate is a bulk semiconductor substrate.

4. The method of claim 1 , wherein the semiconductor substrate is a semiconductor-on-insulator (SOI) substrate, wherein the patterning the upper portion of the semiconductor substrate patterns a top semiconductor layer in the SOI substrate.

5. The method of claim 1 , wherein the patterning the upper portion of the semiconductor substrate is performed by an anisotropic etch.

6. The method of claim 1 , wherein the anisotropic etch is a wet etch using tetramethylammonium hydroxide (TMAH).

7. The method of claim 1 , wherein each of the sidewalls of the sacrificial mandrel has a (111) surface orientation.

8. The method of claim 1 , further comprising forming a dielectric material layer around a bottom portion of the sacrificial mandrel, wherein the alternating channel layer portions and sacrificial layer portions are formed extending upwards from a top surface of the dielectric material layer.

9. The method of claim 1 , wherein the removing the sacrificial mandrel and the hard mask cap forms a trench extending through the dielectric material layer.

10. The method of claim 1 , further comprising forming a trench isolation structure within a bottom portion of the trench, wherein the trench isolation structure has a top surface coplanar with the top surface of the dielectric material layer.

11. The method of claim 2 , wherein the forming the alternating channel layer portions and sacrificial layer portions comprises:

epitaxially depositing alternating channel layers and sacrificial layers on the sidewalls of the sacrificial mandrel and the hard mask cap; and

removing portions of the channel layers and the sacrificial layers that are located above a top surface of the hard mask cap.

12. The method of claim 11 , wherein one of the channel layers is in direct contact with the sidewalls of the sacrificial mandrel.

13. The method of claim 11 , wherein one of the sacrificial layers is in direct contact with the sidewalls of the sacrificial mandrel.

14. The method of claim 11 , wherein each of the channel layers comprises InGaAs, and each of the sacrificial layers comprises InAlAs, InP or AlAs.

15. The method of claim 1 , further comprising forming a gate stack over a portion of each of the channel layer portions.

16. The method of claim 15 , further comprising forming a gate spacer on sidewalls of the gate stack.

17. The method of claim 16 , further comprising forming source/drain regions on portion of the channel layer portions that are not covered by the gate stack, wherein the source/drain regions merge the channel layer portions.

18. A method of forming a semiconductor structure comprising:

forming a sacrificial mandrel extending upwards from a substrate, wherein the forming the sacrificial mandrel comprises:

forming a hard mask layer on a semiconductor substrate;

patterning the hard mask layer to form the hard mask cap; and

patterning an upper portion of the semiconductor substrate using the hard mask cap as an etch mask to provide the sacrificial mandrel;

forming alternating channel layer portions and sacrificial layer portions on sidewalls of the sacrificial mandrel, wherein the alternating channel layer portions and sacrificial layer portions also contact sidewalls of the hard mask cap that is located atop the sacrificial mandrel;

removing the sacrificial mandrel; and

removing the sacrificial layer portion, while maintaining the channel layer portions extending upwards from the substrate.