IP Library › Granted Patent US 9,911,756
Granted Patent B2
US 9,911,756 · App. 15/245,310 · Granted Mar 6, 2018

Semiconductor device including transistor and electronic device surrounded by layer having assigned band gap to prevent electrostatic discharge damage

Inventors: Shunpei Yamazaki (Tokyo, JP); Kiyoshi Kato (Kanagawa, JP); Yuto Yakubo (Kanagawa, JP); Shuhei Nagatsuka (Kanagawa, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
H01L27/1225H01L23/544H01L27/1259H01L29/66969H01L29/7869H01L2223/54453
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Quick Facts
Patent No.
US 9,911,756
App. No.
15/245,310
Granted
Mar 6, 2018
Kind
B2
Abstract

To provide a semiconductor device that is not easily damaged by ESD in a manufacturing process thereof. A layer whose band gap is greater than or equal to 2.5 eV and less than or equal to 4.2 eV, preferably greater than or equal to 2.7 eV and less than or equal to 3.5 eV is provided to overlap with a dicing line. A layer whose band gap is greater than or equal to 2.5 eV and less than or equal to 4.2 eV, preferably greater than or equal to 2.7 eV and less than or equal to 3.5 eV is provided around the semiconductor device such as a transistor. The layer may be in a floating state or may be supplied with a specific potential.

Claims (44)

1. A semiconductor device comprising:

a circuit region; and

a first layer,

wherein the circuit region is surrounded by the first layer, and

wherein a band gap of the first layer is greater than or equal to 2.5 eV and less than or equal to 4.2 eV.

2. The semiconductor device according to claim 1 ,

wherein the first layer comprises an oxide semiconductor.

3. The semiconductor device according to claim 1 ,

wherein the circuit region includes a first transistor.

4. The semiconductor device according to claim 3 ,

wherein the first layer and a semiconductor layer included in the first transistor are in contact with a second layer.

5. The semiconductor device according to claim 4 ,

wherein the circuit region includes a second transistor, and

wherein a band gap of the semiconductor layer of the first transistor is different from a band gap of a semiconductor layer of the second transistor.

6. An electronic device comprising:

the semiconductor device according to claim 1 ; and

a display portion, a power storage device, an operation key, a microphone, or a speaker.

7. A semiconductor device comprising:

a transistor; and

a first layer,

wherein the transistor is surrounded by the first layer, and

wherein a band gap of the first layer is greater than or equal to 2.5 eV and less than or equal to 4.2 eV.

8. The semiconductor device according to claim 7 ,

wherein the first layer comprises an oxide semiconductor.

9. The semiconductor device according to claim 7 ,

wherein the first layer and a semiconductor layer included in the transistor are in contact with a second layer.

10. An electronic device comprising:

the semiconductor device according to claim 7 ; and

a display portion, a power storage device, an operation key, a microphone, or a speaker.

11. A semiconductor device comprising:

a circuit region; and

an oxide semiconductor layer,

wherein the circuit region is surrounded by the oxide semiconductor layer, and

wherein a band gap of the oxide semiconductor layer is greater than or equal to 2.5 eV and less than or equal to 4.2 eV.

12. The semiconductor device according to claim 11 ,

wherein the circuit region includes a first transistor.

13. The semiconductor device according to claim 12 ,

wherein the oxide semiconductor layer and a semiconductor layer included in the first transistor are in contact with a first layer.

14. The semiconductor device according to claim 13 ,

wherein the circuit region includes a second transistor, and

wherein a band gap of the semiconductor layer of the first transistor is different from a band gap of a semiconductor layer of the second transistor.

15. An electronic device comprising:

the semiconductor device according to claim 11 ; and

a display portion, a power storage device, an operation key, a microphone, or a speaker.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 26, 2016
From: YAMAZAKI, SHUNPEI; KATO, KIYOSHI; YAKUBO, YUTO; NAGATSUKA, SHUHEI
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 039558/0433 →
Priority Claims (2)
JP 2015-171051 · Aug 31, 2015 · national
JP 2015-215828 · Nov 2, 2015 · national
Continuity (1)
Related Publication 20170062482A1 · Mar 2, 2017