Power device having a polysilicon-filled trench with a tapered oxide thickness
In one embodiment, a power MOSFET vertically conducts current. A bottom electrode may be connected to a positive voltage, and a top electrode may be connected to a low voltage, such as a load connected to ground. A gate and/or a field plate, such as polysilicon, is within a trench. The trench has a tapered oxide layer insulating the polysilicon from the silicon walls. The oxide is much thicker near the bottom of the trench than near the top to increase the breakdown voltage. The tapered oxide is formed by implanting nitrogen into the trench walls to form a tapered nitrogen dopant concentration. This forms a tapered silicon nitride layer after an anneal. The tapered silicon nitride variably inhibits oxide growth in a subsequent oxidation step.
1. A method of forming a semiconductor device comprising
providing a silicon-containing substrate having a top surface;
epitaxially growing at least one first layer over the top surface of the substrate;
etching a first trench into the at least one first layer to a first depth;
implanting nitrogen ions into at least sidewalls of the first trench at a plurality of angles to create a tapered nitrogen dopant concentration along the sidewalls, wherein the nitrogen dopant concentration along the sidewalls increases from a bottom of the first trench to a top of the first trench to create the tapered nitrogen dopant concentration;
annealing the sidewalls to form a tapered thickness of silicon nitride along the sidewalls;
oxidizing the sidewalls to form silicon dioxide along the sidewalls, wherein a thickness of the silicon dioxide is tapered along the sidewalls due to the tapered thickness of the silicon nitride variably inhibiting growth of the silicon dioxide so that the silicon dioxide near the bottom of the trench is substantially thicker than the silicon dioxide near the top of the trench;
at least partially filling the first trench with a conductive material;
forming a first electrode overlying the at least one first layer; and
forming a second electrode, wherein current is conducted between the first electrode and second electrode when the device is turned on.
2. The method of claim 1 wherein the tapered nitrogen dopant concentration comprises a stepped nitrogen dopant concentration taper along the sidewalls.
3. The method of claim 1 wherein the tapered nitrogen dopant concentration comprises a substantially smooth nitrogen dopant concentration taper along the sidewalls.
4. The method of claim 1 wherein the second electrode contacts a bottom surface of the substrate, and wherein the conductive material within the first trench forms a field plate in a vertical transistor.
5. The method of claim 1 wherein the second electrode contacts a bottom surface of the substrate, and wherein the conductive material within the first trench forms a gate in a vertical transistor.
6. The method of claim 1 wherein the second electrode contacts a bottom surface of the substrate, and wherein the conductive material within the first trench forms a field plate in a vertical transistor, and the field plate is electrically connected to the first electrode.
7. The method of claim 1 wherein the second electrode contacts a bottom surface of the substrate, and wherein the conductive material within the first trench forms a field plate in a vertical transistor, and the field plate is floating.
8. The method of claim 1 wherein the second electrode contacts a bottom surface of the substrate, and wherein the conductive material within the first trench forms a field plate in a vertical transistor, and the field plate is electrically connected to a gate.
9. The method of claim 1 wherein the first trench has angled sidewalls.
10. The method of claim 1 wherein the first trench has substantially parallel sidewalls.
11. The method of claim 1 further comprising:
etching a second trench into the at least one first layer;
implanting nitrogen ions into at least sidewalls of the second trench such that a nitrogen dopant concentration along the sidewalls of the second trench increases from a bottom of the second trench to a top of the second trench to create a tapered nitrogen dopant concentration;
annealing the sidewalls of the second trench to form a tapered thickness of silicon nitride along the sidewalls;
oxidizing the sidewalls of the second trench to form silicon dioxide along the sidewalls, wherein a thickness of the silicon dioxide is tapered along the sidewalls of the second trench so that the silicon dioxide near the bottom of the second trench is substantially thicker than the silicon dioxide near the top of the second trench; and
at least partially filling the second trench with the conductive material,
wherein the conductive material in the first trench forms a gate of a vertical transistor, and the conductive material in the second trench forms a field plate.
12. The method of claim 1 wherein the step of at least partially filling the first trench with the conductive material comprises:
partially filling the first trench with the conductive material to form a first conductive material portion;
forming silicon dioxide over the first conductive material portion; and
filling the first trench with the conductive material to form a second conductive material portion insulated from the first conductive portion,
wherein the second conductive material portion forms a gate for a vertical transistor, and the first conductive material portion forms a field plate.
13. The method of claim 1 wherein the at least one first layer has a first conductivity type, the method further comprising;
forming a well region, having a second conductivity type, in the at least one first layer; and
forming a first region, having the first conductivity type, in the well region, wherein a channel region is formed between an edge of the first region and an edge of the well region,
wherein the semiconductor device is a vertical transistor.
14. The method of claim 1 wherein the conductive material at least partially filling the first trench is a gate that inverts a region when electrically biased to cause a current to flow between the first electrode and the second electrode.
15. The method of claim 1 wherein the substrate is silicon.
16. The method of claim 1 wherein the substrate is SiC.
17. A method of forming a semiconductor device comprising
providing a silicon-containing substrate having a top surface;
epitaxially growing at least one first layer over the top surface of the substrate;
etching a first trench into the at least one first layer to a first depth;
implanting nitrogen ions into at least sidewalls of the first trench at a plurality of angles to create a tapered nitrogen dopant concentration along the sidewalls,
annealing the sidewalls to form a tapered thickness of silicon nitride along the sidewalls;
oxidizing the sidewalls to form silicon dioxide along the sidewalls, wherein a thickness of the silicon dioxide is tapered along the sidewalls due to the tapered thickness of the silicon nitride variably inhibiting growth of the silicon dioxide;
at least partially filling the first trench with a conductive material;
forming a first electrode overlying the at least one first layer; and
forming a second electrode, wherein current is conducted between the first electrode and second electrode when the device is turned on,
wherein the second electrode is formed overlying the at least one first layer, and the device is a lateral MOSFET including a source region and a drain region, wherein the first trench is formed along a drift region between the source region and the drain region,
wherein the step of implanting nitrogen ions comprises implanting nitrogen ions such that a nitrogen dopant concentration along the sidewalls increases from proximate the source region to proximate the drain region to create the tapered nitrogen dopant concentration, and
wherein the step of oxidizing the sidewalls comprises oxidizing the sidewalls so that the silicon dioxide proximate the drain region is substantially thicker than the silicon dioxide proximate the source region.
18. The method of claim 17 further comprising forming a gate proximate to a body region for creating a conductive channel through the body region when the device is turned on, wherein the conductive material filling the first trench is electrically connected to the gate so as to accumulate carriers along the drift region to reduce on-resistance when the device is on.