Combining current sourced by channels of automatic test equipment

1. A test system comprising:

multiple channels, each of the multiple channels being configured to force voltage and to source current; and

circuitry to combine current sourced by the multiple channels to produce a combined current for output on a single channel to a device under test (DUT);

wherein each of the multiple channels comprises a load sharing resistor to control a contribution of a channel to the combined current, and

wherein at least one of multiple channels comprises an impedance circuit having an impedance that is controllable based on a voltage drop across the single channel to affect the contribution of the at least one of multiple channels to the combined current, wherein the multiple channels comprise a master channel and a slave channel, the master channel being the single channel, the master channel comprising a first force line and a first sense line, the master channel further comprising a first load sharing resistor on the first force line and experiencing the voltage drop between the first force line and the first sense line; wherein the circuitry comprises a detector circuit to detect the voltage drop; and wherein the impedance circuit is configurable to introduce a voltage that matches the detected voltage drop into the slave channel.

2. The test system of claim 1 , wherein the slave channel comprises a second force line comprising a second load sharing resistor and a second sense line comprising the impedance circuit, the second force line being connected to the first force line to provide current to the master channel.

3. The test system of claim 1 , wherein the load sharing resistor of each channel has equal resistance.

4. The test system of claim 1 , wherein load sharing resistors of different channels have different resistances.

5. The test system of claim 1 , wherein the load sharing resistor of each channel controls the contribution of each channel to the combined current so that the contribution of each channel to the combined current is equal or of a specified percentage or amount.

6. The test system of claim 1 , wherein the multiple channels are configured to operate in a force voltage mode when outputting the combined current on the single channel.

7. The system of claim 1 , wherein the multiple channels comprise multiple slave channels; and wherein an instance of the impedance circuit is included in each of the multiple slave channels and is configurable to introduce a voltage that is based on a detected voltage drop into each of the multiple slave channels.

8. A test system comprising:

multiple channels, each of the multiple channels being configured to force voltage and to source current; and

circuitry to combine current sourced by the multiple channels to produce a combined current for output on a single channel to a device under test (DUT), each of the multiple channels comprising a load sharing resistor to control a contribution of a channel to the combined current;

wherein the multiple channels comprise a master channel and a slave channel, the master channel being the single channel, the master channel comprising a first force line and a first sense line, the master channel comprising a first load sharing resistor on the first force line and experiencing a voltage drop between the first force line and the first sense line;

wherein the circuitry comprises:

a detector circuit to detect the voltage drop;

an impedance circuit that is configurable to introduce a voltage that is based on the detected voltage drop into the slave channel; and

wherein the detector circuit comprises an instrumentation amplifier having a first input connected to the first force line and a second input connected to first sense line, the first load sharing resistor being connected between the first input and the DUT.

9. The test system of claim 8 , wherein the impedance circuit comprises a variable resistor.

10. A method comprising:

detecting a voltage drop between a force line and a sense line on a channel between test electronics and a device under test (DUT), the channel being a master channel and having a load sharing resistor on the force line;

in a sense line of each of one or more slave channels, configuring an impedance circuit based on the voltage drop to produce an impedance that causes a voltage drop on the one or more slave channels, the impedance being based on the voltage drop detected on the master channel, each of the one or more slave channels having a force line containing a load sharing resistor, the load sharing resistor of each force line controlling an amount of current output from a corresponding force line; and

combining currents from the multiple slave channels with current from the master channel to produce a combined current for output to the DUT.

11. The method of claim 10 , wherein the load sharing resistor of the master channel has a same resistance as load sharing resistors of each of the multiple slave channels.

12. The method of claim 10 , wherein at least one load sharing resistor of the master channel or of the multiple slave channels has a different resistance than at least one other load sharing resistor of the master channel or of the multiple slave channels.

13. The method of claim 10 , wherein each of the multiple slave channels has a sense line, and the voltage is introduced to the sense line of each of the multiple slave channels.

14. The method of claim 10 , the voltage introduced into each of the slave channels is the same as the voltage drop detected in the master channel.

15. A method comprising:

detecting a voltage drop between a force line and a sense line on a channel between test electronics and a device under test (DUT), the channel being a master channel and having a load sharing resistor on the force line;

introducing a voltage into multiple slave channels that is based on the voltage drop, each of the multiple slave channels having a force line containing a load sharing resistor, the load sharing resistor of each force line controlling an amount of current output from a corresponding force line; and

combining currents from the multiple slave channels with current from the master channel to produce a combined current for output to the DUT;

wherein the voltage drop is detected across the load sharing resistor and a force contact resistance of the master channel by an instrumentation amplifier that receives an input from the force line and an input from the sense line, the instrumentation amplifier outputting a signal that is based on the voltage drop, the voltage introduced into the multiple slave channels being based on the signal.

16. Test equipment comprising:

a master channel to force voltage and to source current to a device under test (DUT); and

means for combining currents of multiple slave channels with the current from the master channel to produce a combined current for output to the DUT along the master channel;

wherein each of the master channel and the multiple slave channels has a force line and a sense line, each force line having a load sharing resistor to affect channel current output, and at least one of the sense lines being configurable to have an impedance that is based on a voltage drop on the master channel, the impedance for affecting current output.

17. The test equipment of claim 16 , wherein the current from the master channel and each of the currents of the multiple slave channels has a same value.

18. Test equipment comprising:

a master channel to force voltage and to source current to a device under test (DUT); and

means for combining currents of multiple slave channels with the current from the master channel to produce a combined current for output to the DUT along the master channel;

wherein each of the master channel and the multiple slave channels has a force line and a sense line, each force line having a load sharing resistor to affect channel current output, and each sense line being configurable based on a voltage drop on the master channel; and

wherein the means for combining currents comprises an instrumentation amplifier to detect the voltage drop on the master channel based on inputs from the force line and the sense line of the master channel, and an impedance circuit on each sense line that is configurable based on the voltage drop detected.