IP Library Granted Patent US 9,953,864
Granted Patent B2
US 9,953,864 · App. 15/251,403 · Granted Apr 24, 2018

Interconnect structure

Inventors: Lawrence A. Clevenger (Rhinebeck, NY); Roger A. Quon (Rhinebeck, NY); Terry A. Spooner (Clifton Park, NY); Wei Wang (Schenectady, NY); Chih-Chao Yang (Glenmont, NY)
Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
H01L21/76825H01L21/7684H01L21/76807H01L21/76814H01L21/76843H01L21/76879H01L23/5226H01L23/53238H01L23/53295
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Quick Facts
Patent No.
US 9,953,864
App. No.
15/251,403
Granted
Apr 24, 2018
Kind
B2
Abstract

Semiconductor structures include a patterned interlayer dielectric overlaying a semiconductor substrate. The interlayer dielectric includes a first dielectric layer and at least one additional dielectric layer disposed on the first dielectric layer, wherein the patterned interlayer dielectric comprises at least one opening extending through the interlayer dielectric to the semiconductor substrate. Chemically enriched regions including ions of Si, P, B, N, O and combinations thereof are disposed in surfaces of the first dielectric layer and the at least one dielectric layer defined by the at least one opening. Also described are methods of for forming an interconnect structure in a semiconductor structure.

Claims (18)

1. A semiconductor structure, comprising:

a patterned interlayer dielectric overlaying a semiconductor substrate, wherein the interlayer dielectric comprising a first dielectric layer and at least one additional dielectric layer disposed on the first dielectric layer, wherein the patterned interlayer dielectric comprises at least one opening extending through the interlayer dielectric to the semiconductor substrate; and

chemically enriched regions comprising ions of Si, P, B, N, O or combinations thereof in a surface of the first dielectric layer and the at least one additional dielectric layer are different materials and defined by the at least one opening, wherein the surfaces of the first dielectric layer and the at least one additional dielectric layer have different percentages of the ions.

2. The semiconductor structure of claim 1 , further comprising a barrier layer disposed on the surfaces defined by the at least one opening; and a conductive metal filling the at least one opening.

3. The semiconductor structure of claim 2 , wherein the barrier layer is tantalum.

4. The semiconductor structure of claim 2 , wherein the conductive metal filling the at least one opening contacts an underlying conductive metal line in the semiconductor substrate.

5. The semiconductor structure of claim 1 , wherein the chemically enriched dielectric region comprises nitrogen ions and the percentage of nitrogen ions in the first dielectric layer is greater than the percentage of nitrogen ions in the at least one additional dielectric layer.

6. The semiconductor structure of claim 1 , wherein the chemically enriched dielectric region comprises nitrogen ions and the percentage of nitrogen ions in the first dielectric layer is less than the percentage of nitrogen ions in the at least one additional dielectric layer.

7. The semiconductor structure of claim 1 , wherein the chemically enriched dielectric region comprises nitrogen ions, wherein the first dielectric layer has the percentage of nitrogen greater than 0.5 percent to 1.5 percent and the at least one additional material dielectric layer has the percentage of nitrogen greater than 2 percent.

8. The semiconductor structure of claim 7 , wherein the first dielectric comprises silicon dioxide or tetraorthosilicate, and the second dielectric layer comprises a silsesquioxane or a carbon doped oxide including atoms of Si, C, O and H.

9. The semiconductor structure of claim 1 , wherein the at least one opening comprises a via and a trench feature including at a least a portion coincident with the via, wherein a depth of the trench feature is about equal to a thickness of the at least one additional dielectric layer.

10. The semiconductor structure of claim 1 , wherein the at least one opening comprises a via and a trench feature including at a least a portion coincident with the via, wherein a depth of the trench feature is less than a thickness of the at least one additional dielectric layer.

11. The semiconductor structure of claim 1 , wherein the at least one opening comprises a via and a trench feature including at a least a portion coincident with the via, wherein a depth of the trench feature is greater than a thickness of the at least one additional dielectric layer.

12. A semiconductor structure, comprising:

a patterned interlayer dielectric overlaying a semiconductor substrate, wherein the interlayer dielectric comprising a first dielectric layer and at least one additional dielectric layer disposed on the first dielectric layer, wherein the patterned interlayer dielectric comprises at least one opening extending through the interlayer dielectric to the semiconductor substrate;

chemically enriched regions comprising nitrogen ions in a surface of the first dielectric layer and the at least one additional dielectric layer defined by the at least one opening, wherein a percentage of the nitrogen ions in the chemically enriched dielectric region of first dielectric layer is different from a percentage of the ions in the chemically enriched dielectric region of the at least one additional dielectric layer;

a metal barrier layer disposed on the surfaces defined by the at least one opening; and

a conductive metal filling the at least one opening.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 13, 2020
From: INTERNATIONAL BUSINESS MACHINES CORPORATION
To: ELPIS TECHNOLOGIES INC.
Reel/Frame 052644/0868 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 30, 2016
From: CLEVENGER, LAWRENCE A.; QUON, ROGER A.; SPOONER, TERRY A.; WANG, WEI; YANG, CHIH-CHAO
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 039585/0762 →
Continuity (1)
Related Publication 20180061702A1 · Mar 1, 2018