IP Library Granted Patent US 9,947,866
Granted Patent B2
US 9,947,866 · App. 15/253,603 · Granted Apr 17, 2018

Nonvolatile memory device manufacturing method

Inventor: Kensuke Takahashi (Yokkaichi Mie, JP)
Assignee: TOSHIBA MEMORY CORPORATION
H01L45/085H01L27/2481H01L45/1233H01L45/1266H01L45/146H01L45/1608H01L45/1675
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Quick Facts
Patent No.
US 9,947,866
App. No.
15/253,603
Granted
Apr 17, 2018
Kind
B2
Abstract

A method of manufacturing a nonvolatile memory device includes sequentially forming, on a first wiring layer extending in a first direction, a first layer containing a first metal and a second layer containing a second metal into which the first metal can diffuse. The method further includes oxidizing the first layer and the second layer, removing oxygen from the oxidized first layer by annealing, forming a conductive third layer on the oxidized second layer after removing oxygen from the oxidized first layer, and forming a second wiring layer on the third layer. The second wiring layer extends in a second direction crossing the first wiring layer.

Claims (78)

1. A method of manufacturing a nonvolatile memory device comprising:

sequentially forming, on a first wiring layer that extends in a first direction, a first layer containing a first metal and a second layer containing a second metal into which the first metal can diffuse;

oxidizing the first layer and the second layer;

selectively removing oxygen from the oxidized first layer by annealing;

forming a conductive third layer on the oxidized second layer after selectively removing oxygen from the oxidized first layer; and

forming a second wiring layer on the third layer, the second wiring layer extending in a second direction crossing the first direction.

2. The method according to claim 1 , further comprising:

forming a third wiring layer extending in a third direction crossing the first direction;

forming a conductive fourth layer on the third wiring layer; and

sequentially forming, on the fourth layer, a fifth layer containing the second metal and a sixth layer containing the first metal,

wherein the first wiring layer is formed on the sixth layer.

3. The method according to claim 2 , further comprising:

forming a conductive seventh layer on the first wiring layer;

forming a conductive eighth layer on the third layer;

forming a conductive ninth layer on the eighth layer;

forming the first layer and the second layer on the seventh layer; and

forming the second wiring layer on the ninth layer.

4. The method according to claim 3 , further comprising:

forming a conductive tenth layer on the third wiring layer;

forming the fourth layer on the tenth layer;

forming a conductive eleventh layer on the sixth layer;

forming a conductive twelfth layer on the eleventh layer; and

forming the first wiring layer on the twelfth layer.

5. The method according to claim 1 , wherein:

the first metal is higher than the second metal in ionization energy, and

thermal decomposition temperature of oxide of the first metal is lower than that of the second metal.

6. The method according to claim 5 , wherein:

the thermal decomposition temperature of the oxide of the first metal is 280° C. or less,

the thermal decomposition temperature of the oxide of the second metal is 1000° C. or more, and

a temperature of the annealing is 300° C. or more.

7. The method according to claim 1 , wherein the first metal is silver.

8. The method according to claim 7 , wherein the second metal is aluminum, hafnium, titanium, or zinc.

9. A method of manufacturing a nonvolatile memory device comprising:

sequentially forming, on a first wiring layer that extends in a first direction, a first layer containing a first metal and a second layer containing a second metal into which the first metal can diffuse;

oxidizing the first layer and the second layer;

selectively removing oxygen from the oxidized first layer by annealing;

forming a conductive third layer on the oxidized second layer after selectively removing oxygen from the oxidized first layer; and

forming a second wiring layer on the third layer, the second wiring layer extending in a second direction crossing the first direction,

wherein the thermal decomposition temperature of the oxide of the first metal is lower than the thermal decomposition temperature of the oxide of the second metal.

10. The method according to claim 9 , wherein the first metal is silver.

11. The method according to claim 10 , wherein the second metal is aluminum, hafnium, titanium, or zinc.

12. The method according to claim 11 , further comprising:

forming a third wiring layer extending in a third direction crossing the first direction;

forming a conductive fourth layer on the third wiring layer; and

sequentially forming, on the fourth layer, a fifth layer containing the second metal and a sixth layer containing the first metal,

wherein the first wiring layer is formed on the sixth layer.

13. The method according to claim 12 , wherein a temperature of the annealing is 300° C. or more.

14. The method according to claim 9 , wherein a temperature of the annealing is 200° C. or more.

15. The method according to claim 9 , further comprising:

forming a third wiring layer extending in a third direction crossing the first direction; and

forming a conductive fourth layer on the third wiring layer;

sequentially forming, on the fourth layer, a fifth layer containing the second metal and a sixth layer containing the first metal,

wherein the first wiring layer is formed on the sixth layer.

16. The method according to claim 15 , further comprising:

forming a conductive seventh layer on the first wiring layer;

forming a conductive eighth layer on the third layer;

forming a conductive ninth layer on the eighth layer;

forming the first layer and the second layer on the seventh layer; and

forming the second wiring layer on the ninth layer.

17. The method according to claim 16 , further comprising:

forming a conductive tenth layer on the third wiring layer;

forming the fourth layer on the tenth layer;

forming a conductive eleventh layer on the sixth layer;

forming a conductive twelfth layer on the eleventh layer; and

forming the first wiring layer on the twelfth layer.

18. A method of manufacturing a nonvolatile memory device comprising:

sequentially forming, on a first wiring layer that extends in a first direction, a first layer containing a first metal and a second layer containing a second metal into which the first metal can diffuse;

oxidizing the first layer and the second layer;

selectively removing oxygen from the oxidized first layer by annealing at a temperature of 300° C. or more;

forming a conductive third layer on the oxidized second layer after selectively removing oxygen from the oxidized first layer; and

forming a second wiring layer on the third layer, the second wiring layer extending in a second direction crossing the first direction, wherein:

the thermal decomposition temperature of the oxide of the first metal is 280° C. or less, and

the thermal decomposition temperature of the oxide of the second metal is 1000° C. or more.

19. The method according to claim 18 , further comprising:

forming a third wiring layer extending in a third direction crossing the first direction;

forming a conductive fourth layer on the third wiring layer;

sequentially forming, on the fourth layer, a fifth layer containing the second metal and a sixth layer containing the first metal,

wherein the first wiring layer is formed on the sixth layer.

Assignments (5)
CHANGE OF NAME AND ADDRESS Recorded Jul 29, 2021
From: K.K PANGEA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 057016/0551 →
MERGER Recorded Jul 29, 2021
From: TOSHIBA MEMORY CORPORATION
To: K.K PANGEA
Reel/Frame 057016/0586 →
CHANGE OF NAME AND ADDRESS Recorded Jul 29, 2021
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 057016/0611 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2017
From: KABUSHIKI KAISHA TOSHIBA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 043194/0647 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 2, 2016
From: TAKAHASHI, KENSUKE
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 040496/0519 →
Priority Claims (1)
JP 2015-180079 · Sep 11, 2015 · national
Continuity (1)
Related Publication 20170077100A1 · Mar 16, 2017