Vertical memory cell string with dielectric in a portion of the body
View Patent ↗Some embodiments include a memory cell string having a body having a channel extending therein and in contact with a source/drain, a select gate adjacent to the body, a plurality of access lines adjacent to the body, and a dielectric in a portion of the body between the source/drain and a level corresponding to an end of the plurality of access lines most adjacent to the select gate. The dielectric in the portion of the body does not extend along an entire length of the body. Other embodiments are described and claimed.
1. A memory cell string comprising:
a channel formed in contact with a source/drain and under a select gate; and
a dielectric formed within a portion of the channel under a portion of the select gate, and extending within the portion of the channel under the portion of the select gate.
2. The memory cell string of claim 1 , further comprising an access line over the channel and adjacent to the channel.
3. The memory cell string of claim 2 , wherein the select gate is located between the source/drain and the access line.
4. The memory cell string of claim 2 , wherein the dielectric is positioned adjacent to a corner of the select gate that is adjacent to the access line.
5. The memory cell string of claim 1 , wherein the dielectric is apart from the source/drain.
6. The memory cell string of claim 1 , wherein the access line comprises a word line.
7. The memory cell string of claim 1 , wherein the channel extends away from the source/drain.
8. The memory cell string of claim 1 , further comprising a gate oxide formed on an inner side of the channel adjacent to the select gate to separate the channel from the select gate.
9. The memory cell string of claim 1 , wherein the dielectric is formed on an inner side of the channel away from the select gate, and wherein the dielectric forms a gap in the channel.
10. A memory cell string comprising:
a channel formed in contact with a source/drain, under a select gate, and under an access line, the select gate being between the source/drain and the access line; and
a dielectric formed within a portion of the channel, and extending within the portion of the channel between a first position of the channel that is located under the select gate and a second position of the channel that is located between the select gate and the access line.
11. The memory cell string of claim 10 , wherein the first position of the channel is positioned adjacent to a corner of the select gate that is adjacent to the access line.
12. The memory device of claim 10 , wherein the dielectric partially blocks the channel and forms a gap in the channel in a direction that the channel extends.
13. A system including a memory device, wherein the memory device comprises a string of memory cells, the string of memory cells comprising:
a body having a channel extending therein, the channel being in contact with a source/drain;
a select gate adjacent to the body;
a plurality of access lines adjacent to the body; and
a dielectric in a portion of the channel, wherein the dielectric is adjacent to a corner of the select gate that is adjacent to the plurality of access lines.
14. The system of claim 13 , wherein the dielectric partially blocks the channel and forms a gap in the channel in a direction that the channel extends.
15. The system of claim 13 , wherein the dielectric comprises an oxide.
16. The system of claim 13 , wherein the dielectric comprises a nitride.
17. The system of claim 13 , wherein the string of memory cells comprises a string of NAND memory cells.
18. The system of claim 13 , wherein the string of memory cells comprises a string of floating gate memory cells.
19. The system of claim 13 , wherein the string of memory cells comprise a string of Silicon-Oxide-Nitride-Oxide-Silicon (SONOS) memory cells.
20. The system of claim 13 , wherein the string of memory cells comprise a string of Metal-Oxide-Nitride-Oxide-Silicon (MONOS) memory cells.