SYSTEM AND METHOD FOR REDUCING HIBERNATE AND RESUME TIME

1 . A method for conserving power in a computing device having a volatile system memory, a non-volatile storage device, and a processor executing an operating system and including an internal non-volatile memory, the method comprising:

receiving, at the processor, a request to enter the computing device into a hibernation mode;

suspending, by the processor, execution of the operating system;

copying, by the processor, substantially an entire contents of the volatile system memory into the non-volatile storage device;

storing, in the internal non-volatile memory of the processor, a hibernate flag; and

turning off power to the computing device.

2 . The method of claim 1 , further comprising:

restoring power to the computing device;

restoring, by the processor, the copied contents to the volatile system memory; and

resuming, by the processor, execution of the operating system from its suspended state.

3 . The method of claim 2 , wherein the processor further includes an internal read-only-memory storing a boot program, the method further comprising:

following restoration of power to the computing device, executing, by the processor, the boot program;

checking, by the processor, whether the hibernate flag is set in the internal non-volatile memory; and

only restoring the copied contents to the volatile system memory if the hibernate flag is set, wherein if the hibernate flag is not set, the processor performs a cold boot using the boot program.

4 . The method of claim 1 , wherein the non-volatile storage device is a flash memory.

5 . The method of claim 4 , wherein the flash memory is one of a Secure Digital (SD) card or an embedded MultiMediaCard (eMMC).

6 . The method of claim 1 , wherein the processor is configured to execute at least one program within the operating system, the method further comprising:

stopping, by the processor, execution of the at least one program and saving a state of the at least one program into the volatile system memory prior to suspension of execution of the operating system.

7 . The method of claim 1 , wherein the processor includes an internal volatile memory storing a copy program, and wherein the copying of the volatile system memory contents into the non-volatile storage device is performed by the processor by executing the copy program.

8 . The method of claim 1 , wherein the volatile system memory is a dynamic random access memory (DRAM).

9 . A computing device, comprising:

a volatile system memory;

a non-volatile storage device; and

a processor executing an operating system and including an internal non-volatile memory, the processor being configured to:

receive a request to enter the computing device into a hibernation mode,

suspend execution of the operating system,

copy substantially an entire contents of the volatile system memory into the non-volatile storage device,

storing in the internal non-volatile memory, a hibernate flag, and

turn off power to the computing device.

10 . The computing device of claim 9 , wherein the processor is further configured to:

restore power to the computing device,

restore the copied content to the volatile system memory, and

resume execution of the operating system from its suspended state.

11 . The computing device of claim 10 , wherein the processor further includes an internal read-only-memory (ROM) that stores a boot program, and the processor is further configured to:

following restoration of power to the computing device, execute the boot program,

check whether the hibernate flag is set in the internal non-volatile memory; and

only restore the copied content to the volatile system memory if the hibernate flag is set, wherein if the hibernate flag is not set, the processor performs a cold boot using the boot program.

12 . The computing device of claim 9 , wherein the non-volatile storage device is a flash memory.

13 . The computing device of claim 12 , wherein the flash memory is one of a Secure Digital (SD) card or an embedded MultiMediaCard (eMMC).

14 . The computing device of claim 9 , wherein the processor is further configured to:

execute at least one program within the operating system, and

stop execution of the at least one program and save a state of the at least one program into the volatile system memory prior to suspension of execution of the operating system.

15 . The computing device of claim 9 , wherein the processor further includes an internal volatile memory that stores a copy program, and wherein the processor is further configured to copy the volatile system memory content into the non-volatile storage device by executing the copy program.

16 . The computing device of claim 9 , wherein the volatile system memory is a dynamic random access memory (DRAM).