Method of manufacturing semiconductor device
Provided is a technique capable of obtaining a satisfactory yield for a semiconductor device with an air gap. The technique includes a method of manufacturing a semiconductor device, including: (a) receiving a thickness information of a wiring layer formed on a substrate including: a first interlayer insulation film; and the wiring layer disposed on the first interlayer insulation film, the wiring layer including: copper-containing films used as wiring; and an inter-wiring insulation film having trenches filled with the copper-containing films and insulating the copper-containing films; (b) placing the substrate on a substrate support installed in a process chamber; and (c) etching the wiring layer using an etching gas based on an etching control value corresponding to the thickness information of the wiring layer.
1. A method of manufacturing a semiconductor device, comprising:
(a) receiving a thickness information of a wiring layer formed on a substrate comprising: a first interlayer insulation film; and the wiring layer disposed on the first interlayer insulation film, the wiring layer comprising: copper-containing films used as wiring; and an inter-wiring insulation film having trenches filled with the copper-containing films and insulating the copper-containing films;
(b) placing the substrate on a substrate support installed in a process chamber; and
(c) etching the wiring layer using an etching gas based on an etching control value corresponding to the thickness information of the wiring layer.
2. The method of claim 1 , wherein the etching control value includes an etching time duration and the etching time duration is set such that the wiring layer is etched to a depth deeper than a bottom of the trenches.
3. The method of claim 1 , wherein the thickness information comprises a thickness of the inter-wiring insulation film.
4. The method of claim 3 , wherein the thickness information comprises a thickness of the wiring layer after the copper-containing films are polished.
5. The method of claim 1 , wherein the thickness information comprises a thickness of the wiring layer after the copper-containing films are polished.
6. The method of claim 1 , wherein the thickness information comprises thicknesses of the wiring layer at a center portion and a peripheral portion of the substrate, and wherein an amount of exposure to the etching gas per unit area of the center portion is greater than an amount of exposure to the etching gas per unit area of the peripheral portion in the step (c) when the thickness information indicates the thickness of the wiring layer at the center portion is greater than the thickness of the wiring layer at the peripheral portion, and the amount of exposure to the etching gas per unit area of the peripheral portion is greater than the amount of exposure to the etching gas per unit area of the center portion in the step (c) when the thickness information indicates the thickness of the wiring layer at the peripheral portion is greater than the thickness of the wiring layer at the center portion.
7. The method of claim 6 , wherein the thickness information comprises a thickness of the wiring layer after the copper-containing films are polished.
8. The method of claim 1 , wherein the thickness information comprises thicknesses of the wiring layer at a center portion and a peripheral portion of the substrate, and wherein an amount of the etching gas supplied to the center portion is greater than an amount of the etching gas supplied to the peripheral portion in the step (c) when the thickness information indicates the thickness of the wiring layer at the center portion is greater than the thickness of the wiring layer at the peripheral portion, and the amount of the etching gas supplied to the peripheral portion is greater than the amount of the etching gas supplied to the center portion in the step (c) when the thickness information indicates the thickness of the wiring layer at the peripheral portion is greater than the thickness of the wiring layer at the center portion.
9. The method of claim 8 , wherein the thickness information comprises a thickness of the wiring layer after the copper-containing films are polished.
10. The method of claim 1 , wherein the thickness information comprises thicknesses of the wiring layer at a center portion and a peripheral portion of the substrate, and wherein a concentration of the etching gas supplied to the center portion is greater than a concentration of the etching gas supplied to the peripheral portion in the step (c) when the thickness information indicates the thickness of the wiring layer at the center portion is greater than the thickness of the wiring layer at the peripheral portion, and the concentration of the etching gas supplied to the peripheral portion is greater than the concentration of the etching gas supplied to the center portion in the step (c) when the thickness information indicates the thickness of the wiring layer at the peripheral portion is greater than the thickness of the wiring layer at the center portion.
11. The method of claim 10 , wherein the thickness information comprises a thickness of the wiring layer after the copper-containing films are polished.
12. The method of claim 10 , wherein the concentrations of the etching gas supplied to the peripheral portion and the center portion are controlled by controlling an amount of an inert gas added to the etching gas.
13. The method of claim 12 , wherein the thickness information comprises a thickness of the wiring layer after the copper-containing films are polished.
14. The method of claim 1 , wherein the thickness information comprises thicknesses of the wiring layer at a center portion and a peripheral portion of the substrate, wherein a plasma density of the etching gas supplied to the center portion is greater than a plasma density of the etching gas supplied to the peripheral portion in the step (c) when the thickness information indicates the thickness of the wiring layer at the center portion is greater than the thickness of the wiring layer at the peripheral portion, and the plasma density of the etching gas supplied to the peripheral portion is greater than the plasma density of the etching gas supplied to the center portion in the step (c) when the thickness information indicates the thickness of the wiring layer at the peripheral portion is greater than the thickness of the wiring layer at the center portion.
15. The method of claim 14 , wherein the thickness information comprises a thickness of the wiring layer after the copper-containing films are polished.
16. The method of claim 14 , wherein an electric potential of a bias electrode installed at a center portion of the substrate support is lower than an electric potential of a bias electrode installed at a peripheral portion of the substrate support in the step (c) when the thickness information indicates the thickness of the wiring layer at the center portion of the substrate is greater than the thickness of the wiring layer at the peripheral portion of the substrate, and the electric potential of the bias electrode installed at the peripheral portion of the substrate support is lower than the electric potential of the bias electrode installed at the center portion of the substrate support in the step (c) when the thickness information indicates the thickness of the wiring layer at the peripheral portion of the substrate is greater than the thickness of the wiring layer at the center portion of the substrate.
17. The method of claim 16 , wherein the thickness information comprises a thickness of the wiring layer after the copper-containing films are polished.