Photovoltaic Devices Including Uniform Intrinsic Layer
A photovoltaic device includes an intrinsic layer having two or more sublayers. The sublayers are intentionally deposited to include complementary concave and convex shapes. The sum of these layers resulting in a relatively flat surface for deposition of n- or p-doped layers. The photovoltaic device is optionally bifacial.
1 . A photovoltaic device comprising:
a wafer substrate;
a first absorber layer disposed on a first side of the wafer substrate;
a second absorber layer, the first and second absorber layers in combination forming an intrinsic layer, the first absorber layer being disposed between the wafer substrate and the second absorber layer, wherein a uniformity of a thickness of the intrinsic layer is greater than a uniformity of a thickness of the first absorber layer;
a first doped layer;
a first transparent conductive layer, the first doped layer being disposed between the first transparent conductive layer and the wafer substrate;
front conductors in contact with the transparent conductive layer; and
rear conductors disposed on a second side of the wafer substrate.
2 . The device of claim 1 , wherein, the first doped layer is p-doped or n-doped.
3 . The device of claim 1 , wherein the first absorber layer is concave and the second absorber layer is convex.
4 . The device of claim 1 , wherein the first absorber layer is convex and the second absorber layer is concave.
5 . The device of claim 1 , further comprising
a third absorber layer disposed on the second side of the wafer substrate;
a fourth absorber layer, the third absorber layer being disposed between the wafer substrate and the fourth absorber layer, the third and fourth absorber layer sharing a curved interface; and
an second doped layer, a boundary between the fourth absorber layer and the second doped layer being flatter than the curved interface, wherein the first doped layer includes a different dopant relative to the second doped layer.
6 . The device of claim 5 , further comprising a second transparent conductive layer, the second doped layer being disposed between the second transparent conductive layer and the wafer substrate.
7 . The device of claim 5 , further comprising a reflective conductive layer, the second doped layer being disposed between the reflective conductive layer and the wafer substrate.
8 . The device of claim 1 , wherein the first and second absorber layer consist of the same materials.
9 . The device of claim 1 , wherein the first and second absorber layer consist of the same materials at the same concentrations.
10 . The device of claim 1 , wherein the second absorber layer includes a gradient of dopant material, a concentration of the dopant material being greater proximate to the first doped layer.
11 . The device of claim 1 , wherein the second absorber layer includes a greater amount of dopant material, relative to the first absorber layer.
12 . The device of claim 1 , wherein the second absorber layer includes a seed material configured for growth of the first doped layer.
13 . The device of claim 12 , wherein the seed material includes boron.
14 . The device of claim 1 , wherein the second absorber layer is less transparent at solar wavelengths, relative to the first absorber layer.
15 . The device of claim 1 , wherein a material of the second absorber layer is configured to be more resilient to damage during deposition of the first doped layer, relative to a material of the first absorber layer.
16 . The device of claim 1 , wherein the second absorber layer includes a greater concentration of protons, relative to the first absorber layer.
17 . The device of claim 1 , wherein a minimum thickness of the first absorber layer is at least 5% less than a maximum thickness of the first absorber layer.
18 . The device of claim 1 , wherein an average total thickness of the first and second absorber layers is less than 50 angstroms.
19 . The device of claim 1 , wherein a boundary between the second absorber layer and the first doped layer is at least 5% more uniform than a boundary between the first and second absorber layers.
20 . The device of claim 1 , wherein the wafer substrate includes an etched surface.
21 . The device of claim 1 , wherein the intrinsic layer is configured to passivate the wafer substrate.