Selective surface modification of interconnect structures
Semiconductor structures including copper interconnect structures and methods include selective surface modification of copper by providing a Cu x Ti y N z alloy in the surface. The methods generally include forming a titanium nitride layer on an exposed copper surface followed by annealing to form the Cu x Ti y N z alloy in the exposed copper surface. Subsequently, the titanium layer is removed by a selective wet etching.
1. A method for forming an interconnect structure in a semiconductor substrate, the method comprising:
forming at least one opening extending through an interlayer dielectric to form a patterned interlayer dielectric;
depositing copper into the at least one opening and form an overburden on the interlayer dielectric;
planarizing the copper to the interlayer dielectric, wherein a top surface of the copper is coplanar to a top surface of the interlayer dielectric;
depositing a titanium nitride layer on the coplanar top surfaces of the copper and the interlayer dielectric;
annealing the semiconductor structure to form a Cu x Ti y N z alloy in the top surface of the copper, wherein 0<x<1, 0<y<1,and 0≦z<1; and
removing the titanium nitride layer from the coplanar top surfaces of the copper and the interlayer dielectric by a wet etching process selective to the interlayer dielectric and the Cu x Ti y N z alloy.
2. The method of claim 1 , planarizing the copper to the interlayer dielectric comprises a chemical mechanical planarization process.
3. The method of claim 1 , wherein annealing the copper comprises furnace annealing at a temperature of 100° C. to 500° C. for a period of time of 20 minutes to 4 hours.
4. The method of claim 1 , wherein depositing the titanium nitride layer is a sputtering process or a plasma vapor deposition process.
5. The method of claim 1 , wherein the titanium nitride layer is deposited at a thickness from 1 Angstrom to 1000 Angstroms.
6. The method of claim 1 , further comprising conformally depositing a liner layer on the patterned interlayer dielectric prior to depositing copper into the at least one opening.
7. The method of claim 6 , wherein the liner layer is formed of a material comprising tantalum, titanium, cobalt, ruthenium, tantalum nitride or titanium nitride.
8. The method of claim 1 , wherein depositing copper into the at least one opening comprises an electrodeposition process.
9. The method of claim 1 , wherein the wet etch process comprises contacting a mixture of ammonium hydroxide, an azole compound, and hydrogen peroxide for a period of time and at a temperature effective to etch the titanium nitride selectively to the copper and the interlayer dielectric.
10. The method of claim 1 , wherein the azole compound is benzotriazole.
11. The method of claim 1 , wherein the wet etch process comprises contacting a mixture of hydrogen peroxide, an azole compound, and an organic onium hydroxide compound for a period of time and at a temperature effective to etch the titanium nitride selectively to the copper and the interlayer dielectric.