IP Library Patent Application 15281966
Patent Application
App. No. 15/281,966

COMPACT TESTING SYSTEM

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Quick Facts
Patent No.
US None
App. No.
15/281,966
Abstract

An automated test platform includes a CPU subsystem housed in an enclosure and configured to execute an automated test process. A test head is housed in the enclosure and is configured to apply one or more test signals to a device under test. A power supply is housed in the enclosure and is configured to provide electrical power to the CPU subsystem and the test head.

Claims (38)

1 . An automated test platform comprising:

a CPU subsystem housed in an enclosure and configured to execute an automated test process;

a test head housed in the enclosure and configured to apply one or more test signals to a device under test; and

a power supply housed in the enclosure and configured to provide electrical power to the CPU subsystem and the test head.

2 . The automated test platform of claim 1 further comprising:

an interconnection platform configured to couple the CPU subsystem and the test head.

3 . The automated test platform of claim 2 wherein the interconnection platform includes:

a PCIe bus that is configured to allow the CPU subsystem and the test head to communicate via PCIe communication standards.

4 . The automated test platform of claim 2 wherein the interconnection platform includes:

a USB bus that is configured to allow the CPU subsystem and the test head to communicate via USB communication standards.

5 . The automated test platform of claim 2 wherein the interconnection platform is configured to allow the automated test platform to interface with an external computing device.

6 . The automated test platform of claim 1 wherein the CPU subsystem includes:

one or more of a personal computer, a server computer, a series of server computers, a mini computer or a single-board computer.

7 . The automated test platform of claim 1 wherein the automated test platform is configured to be spatially manipulated by a manipulator system.

8 . The automated test platform of claim 7 wherein the manipulator system is configured to move the automated test platform in the X axis, the Y axis and/or the Z axis.

9 . The automated test platform of claim 7 wherein the manipulator system is configured to rotate the automated test platform about the X axis, the Y axis and/or the Z axis.

10 . The automated test platform of claim 1 wherein the automated test platform is configured to interface with a handler system.

11 . The automated test platform of claim 10 wherein the handler system is configured to automate the testing of the device under test.

12 . An automated test enclosure comprising:

a CPU subsystem configured to execute an automated test process;

a test head configured to apply one or more test signals to a device under test;

an interconnection platform configured to couple the CPU subsystem and the test head; and

a power supply configured to provide electrical power to the CPU subsystem, the test head and the interconnection platform.

13 . The automated test enclosure of claim 12 wherein the interconnection platform includes:

a USB bus that is configured to allow the CPU subsystem and the test head to communicate via USB communication standards.

14 . The automated test enclosure of claim 12 wherein the interconnection platform is configured to allow the automated test enclosure to interface with an external computing device.

15 . The automated test enclosure of claim 12 wherein the CPU subsystem includes:

one or more of a personal computer, a server computer, a series of server computers, a mini computer or a single-board computer.

16 . The automated test enclosure of claim 12 wherein the automated test enclosure is configured to be spatially manipulated by a manipulator system.

17 . The automated test enclosure of claim 12 wherein the automated test enclosure is configured to interface with a handler system.

18 . An automated test platform comprising:

a CPU subsystem housed in an enclosure and configured to execute an automated test process;

a test head housed in the enclosure and configured to apply one or more test signals to a device under test;

an interconnection platform housed in the enclosure and configured to couple the CPU subsystem and the test head;

a power supply housed in the enclosure and configured to provide electrical power to the CPU subsystem, the test head and the interconnection platform; and

a manipulator system configured to spatially manipulate the enclosure.

19 . The automated test platform of claim 18 wherein the manipulator system is configured to move the automated test platform in the X axis, the Y axis and/or the Z axis.

20 . The automated test platform of claim 18 wherein the manipulator system is configured to rotate the automated test platform about the X axis, the Y axis and/or the Z axis.

Assignments (4)
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS, RECORDED AT REEL 047185, FRAME 0624 Recorded Mar 7, 2024
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS AGENT
To: XCERRA CORPORATION
Reel/Frame 066762/0811 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT STATEMENT THAT THIS DOCUMENT SERVES AS AN OATH/DECLARATION PREVIOUSLY RECORDED ON REEL 047185 FRAME 0628. ASSIGNOR(S) HEREBY CONFIRMS THE PATENT SECURITY AGREEMENT. Recorded Nov 28, 2018
From: XCERRA CORPORATION
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 047675/0354 →
PATENT SECURITY AGREEMENT Recorded Oct 2, 2018
From: XCERRA CORPORATION
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 047185/0624 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 29, 2016
From: BROWN, BENJAMIN; POFFENBERGER, RUSSEL
To: XCERRA CORPORATION
Reel/Frame 040454/0247 →