IP Library › Granted Patent US 9,883,598
Granted Patent B2
US 9,883,598 · App. 15/289,950 · Granted Jan 30, 2018

Circuit board and method for manufacturing the same

Inventors: Yin-Ju Chen (Taoyuan, TW); Ming-Hao Wu (Taoyuan, TW); Cheng-Po Yu (Taoyuan, TW)
Assignee: UNIMICRON TECHNOLOGY CORP.
H05K3/4647G06F1/206H01L23/12H01L23/49827H01L35/30H05K1/0203H05K1/0206H05K1/113H05K1/14H05K1/181H05K1/185H05K1/187H05K3/36H05K3/4697H01L2224/16225H05K2201/048H05K2201/10219H05K2201/10378H05K2201/10515H05K2201/10734
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,883,598
App. No.
15/289,950
Granted
Jan 30, 2018
Kind
B2
Abstract

A circuit board with a heat-recovery function includes a substrate, a heat-storing device, and a thermoelectric device. The heat-storing device is embedded in the substrate and connected to a processor for performing heat exchange with the processor. The thermoelectric device embedded in the substrate includes a first metal-junction surface and a second metal-junction surface. The first metal-junction surface is connected to the heat-storing device for performing heat exchange with the heat-storing device. The second metal-junction surface is joined with the first metal-junction surface, in which the thermoelectric device generates an electric potential by a temperature difference between the first metal-junction surface and the second metal-junction surface.

Claims (12)

1. A method for a circuit board having a heat-recovery function, comprising:

forming at least one first via at a single-layer dielectric layer and disposing at least one first heat-conducting pillar in the first via;

building up a plurality of buildup-dielectric layers from the single-layer dielectric layer to form a substrate;

respectively forming a first recess and a second recess on two opposite surfaces of the substrate, wherein the single-layer dielectric layer is between the first recess and the second recess;

disposing a thermoelectric device into the first recess for embedding the thermoelectric device in the substrate, wherein the thermoelectric device is connected to the first heat-conducting pillar;

forming at least one second via at a heat-storing device and filling the second via with at least one second heat-conducting pillar such that the heat-storing device is penetrated by the second heat-conducting pillar;

disposing a processor on the heat-storing device, wherein the processor is connected to and in contact with the second heat-conducting pillar; and

disposing the heat-storing device and the processor into the second recess for embedding the heat-storing device in the substrate, wherein the heat-storing device is between the processor and the thermoelectric device.

2. The method of claim 1 , wherein the disposing the processor on the heat-storing device comprises:

disposing the processor in a third recess of the heat-storing device.

3. The method of claim 1 , wherein the first heat-conducting pillar is coupled to the second heat-conducting pillar through a solder ball after the disposing the heat-storing device and the processor into the second recess.

4. The method of claim 1 , wherein the first heat-conducting pillar and the second heat-conducting pillar are aligned to a line.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 12, 2016
From: CHEN, YIN-JU; WU, MING-HAO; YU, CHENG-PO
To: UNIMICRON TECHNOLOGY CORP.
Reel/Frame 040001/0655 →
Continuity (2)
Division 14695057 · Apr 24, 2015
Related Publication 20170034925A1 · Feb 2, 2017