IP Library Granted Patent US 10,853,233
Granted Patent B2
US 10,853,233 · App. 15/296,841 · Granted Dec 1, 2020

Reconstruction of address mapping in a host of a storage system

Inventors: Daisuke Hashimoto (Susono, JP); Shigehiro Asano (Yokosuka Kanagawa, JP); Katsuhiko Ueki (Katsushika Tokyo, JP); Mark Hayashida (San Ramon, CA)
Assignee: TOSHIBA MEMORY CORPORATION
G06F12/0246G06F3/061G06F3/064G06F3/0619G06F3/0659G06F3/0679G06F2212/7201
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Quick Facts
Patent No.
US 10,853,233
App. No.
15/296,841
Granted
Dec 1, 2020
Kind
B2
Abstract

A storage device includes a nonvolatile memory including a plurality of physical blocks, a communication interface connectable to a host, and a controller. The controller is configured to generate metadata of host data, which include user data and metadata of the user data, and write, in a physical block of the nonvolatile memory, the metadata of the host data, the metadata of the user data, and the user data continuously in this order, when the host data are received through the communication interface in association with a write command.

Claims (61)

1. A storage device comprising:

a nonvolatile memory including a plurality of physical blocks;

a communication interface connectable to a host; and

a controller configured to:

receive through the communication interface from the host, a write command and host data associated with the write command, the host data including user data to be stored and first metadata relating to the user data, the first metadata including at least a size thereof and a size of the user data;

in response to receiving the host data, generate second metadata relating to the received host data, the second metadata being different from the first metadata, the second metadata including metadata relating thereto, metadata relating to the user data, and metadata relating to the first metadata; and

write, in a physical block of the nonvolatile memory, the generated second metadata, the received first metadata, and the received user data continuously in this order.

2. The storage device according to claim 1 , wherein

the first metadata also include a logical address or identifier of the user data, and

the second metadata include at least a size thereof, a size of the first metadata, and the size of the user data.

3. The storage device according to claim 2 , wherein

when the user data from a single write command are split into multiple portions and written in multiple physical blocks, the controller writes the second metadata and the first metadata and a portion of the user data continuously in this order, in each of the multiple physical blocks.

4. The storage device according to claim 3 , wherein

the second metadata written in each of the multiple physical blocks further include a different offset value indicative of an arranging sequence of the split portions of the user data.

5. The storage device according to claim 1 , wherein

the controller is further configured to:

determine a physical location of the nonvolatile memory in which the second metadata, the first metadata, and the user data are to be written, when the write command is received through the communication interface; and

control the communication interface to return a notification along with the determined physical location upon completion of writing of the host data, the first metadata, and the user data.

6. The storage device according to claim 1 , wherein

the controller is further configured to selectively read second metadata relating to host data and first metadata relating to user data stored in all physical blocks that store valid user data without reading user data and control the communication interface to transmit the read metadata, when a scan command is received through the communication interface.

7. The storage device according to claim 6 , wherein

the controller controls the communication interface to transmit the read metadata each time reading of a physical block completes.

8. The storage device according to claim 6 , wherein

the controller is further configured to control the communication interface to return a notification upon completion of reading metadata from said all physical blocks that store valid user data.

9. A storage system comprising:

a storage device including a nonvolatile memory including a plurality of physical blocks, a communication interface, and a controller; and

a host connected to the communication interface of the storage device, and including a processor and a volatile memory in which mapping between a logical address or identifier of user data and a physical location of the nonvolatile memory is stored, wherein

the controller is configured to:

receive through the communication interface from the host, a write command and host data associated with the write command, the host data including user data to be stored and first metadata relating to the user data, the first metadata including at least a size thereof and a size of the user data;

in response to receiving the host data, generate second metadata relating to the received host data, the second metadata being different from the first metadata, the second metadata including metadata relating thereto, metadata relating to the user data, and metadata relating to the first metadata; and

write, in a physical block of the nonvolatile memory, the generated second metadata, the received first metadata, and the received user data continuously in this order.

10. The storage system according to claim 9 , wherein

the first metadata also include a logical address or identifier of the user data, and

the second metadata include at least a size thereof, a size of the first metadata, and the size of the user data.

11. The storage system according to claim 10 , wherein

when the user data from a single write command are split into multiple portions and written in multiple physical blocks, the controller writes the second metadata and the first metadata and a portion of the user data continuously in this order, in each of the multiple physical blocks.

12. The storage system according to claim 11 , wherein

the second metadata written in each of the multiple physical blocks further include a different offset value indicative of an arranging sequence of the split portions of the user data.

13. The storage system according to claim 9 , wherein

the controller is configured to determine a physical location of the nonvolatile memory in which the second metadata, the first metadata, and the user data are to be written, and transmit the physical location along with the write command.

14. The storage system according to claim 9 , wherein

the controller is further configured to selectively read second metadata relating to host data and first metadata relating to user data stored in all physical blocks that store valid user data without reading user data and control the communication interface to transmit the read metadata, when a scan command is received through the communication interface from the host.

15. The storage system according to claim 14 , wherein

the controller controls the communication interface to transmit the read metadata each time reading of a physical block completes.

16. The storage system according to claim 14 , wherein

the processor is configured to issue the scan command when the mapping is lost from the volatile memory or when the mapping in the volatile memory is not accessible.

17. The storage system according to claim 16 , wherein

the processor is configured to reconstruct the mapping based on the metadata received through the communication interface.

18. A computing device connectable to a nonvolatile storage device, comprising:

a volatile memory; and

a processor configured to:

transmit host data, which include user data to be stored and first metadata relating to the user data, in association with a write command issued thereby, the first metadata including at least a size thereof and a size of the user data;

store, in the volatile memory, mapping that has been constructed, the mapping being between a logical address or identifier of the user data and a physical location of the nonvolatile storage device in which the user data are written;

issue a scan command to the nonvolatile storage device when the mapping is lost from the volatile memory or when the mapping in the volatile memory is not accessible; and

reconstruct the mapping that has been lost based on second metadata relating to the host data and the first metadata, the second metadata being different from the first metadata, the second metadata including metadata relating thereto, metadata relating to the user data, and metadata relating to the first metadata, the second metadata being generated by the nonvolatile storage device and returned from the nonvolatile storage device in response to the scan command.

19. The computing device according to claim 18 , wherein

the first metadata also include a logical address or identifier of the user data, and

the second metadata include at least a size thereof, a size of the first metadata, and the size of the user data.

20. The computing device according to claim 18 , wherein the processor is configured to:

issue the write command that further includes an identifier of the write command; and

receive from the nonvolatile storage device in response to the write command, the identifier and a physical location of the nonvolatile storage device in which the first metadata, the second metadata, and the user data have been written.

Assignments (7)
CHANGE OF NAME AND ADDRESS Recorded Feb 4, 2022
From: K.K PANGEA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 058957/0124 →
CHANGE OF NAME AND ADDRESS Recorded Jan 31, 2022
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 058905/0582 →
MERGER Recorded Jan 31, 2022
From: TOSHIBA MEMORY CORPORATION
To: K.K PANGEA
Reel/Frame 058946/0675 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 21, 2020
From: ASANO, SHIGEHIRO; UEKI, KATSUHIKO; HAYASHIDA, MARK
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 052455/0042 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 7, 2020
From: TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC.
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 051756/0160 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 5, 2020
From: HASHIMOTO, DAISUKE
To: TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC.
Reel/Frame 051724/0299 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2017
From: KABUSHIKI KAISHA TOSHIBA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 043194/0647 →
Continuity (1)
Related Publication 20180107592A1 · Apr 19, 2018