Package materials monitor and method therefor
A stacked monitor structure and method of measuring thicknesses of embedded layers in a build-up substrate is provided. The stacked monitor structure includes a multi-layer substrate having a first shape formed in a first conductive layer of the multi-layer substrate and a second shape formed in a second conductive layer of the multi-layer substrate, a region of the second shape overlapping the first shape. A first dielectric layer is disposed between the first conductive layer and the second conductive layer. A measuring device is configured to measure a thickness of the first conductive layer at a first location on the stacked monitor structure, a thickness of the second conductive layer at a second location on the stacked monitor structure, and a combined thickness of the first conductive layer, the second conductive layer, and the first dielectric layer at a third location on the stacked monitor structure.
1. A stacked monitor structure comprising:
a multi-layer substrate;
a first shape formed in a first conductive layer of the multi-layer substrate;
a second shape formed in a second conductive layer of the multi-layer substrate, a region of the second shape overlapping the first shape;
a first dielectric layer disposed between the first conductive layer and the second conductive layer; and
a measuring device configured to measure a thickness of the first conductive layer at a first location on the stacked monitor structure, a thickness of the second conductive layer at a second location on the stacked monitor structure, and a combined thickness of the first conductive layer, the second conductive layer, and the first dielectric layer at a third location on the stacked monitor structure.
2. The stacked monitor structure of claim 1 , wherein a measuring device configured to measure a thickness is configured to non-destructively measure a thickness.
3. The stacked monitor structure of claim 1 , wherein the first dielectric is formed from a non-crystalline organic material.
4. The stacked monitor structure of claim 1 , wherein the first shape and the second shape are characterized as “L” shapes formed with substantially similar width and length dimensions.
5. The stacked monitor structure of claim 1 , wherein the third location corresponds to the region of the second shape overlapping the first shape.
6. The stacked monitor structure of claim 1 , wherein the first and second conductive layers comprise a copper (Cu) material.
7. The stacked monitor structure of claim 1 , wherein the measuring device further comprises a laser caliper.
8. The stacked monitor structure of claim 1 , wherein the multi-layer substrate further comprises a core layer formed from a glass epoxy material.
9. The stacked monitor structure of claim 1 , wherein the multi-layer substrate further includes bonding sites for attaching a semiconductor die in a flip-chip configuration, at least one of the bonding sites electrically coupled to the first conductive layer.
10. A method comprising:
providing a stacked monitor structure including:
a multi-layer substrate;
a first shape formed in a first conductive layer of the multi-layer substrate;
a second shape formed in a second conductive layer of the multi-layer substrate, a portion of the second shape overlapping the first shape; and
a first dielectric layer disposed between the first conductive layer and the second conductive layer;
measuring a thickness of the first conductive layer with a measuring device at a first location of the stacked monitor structure;
measuring a thickness of the second conductive layer with the measuring device at a second location of the stacked monitor structure; and
determining a thickness of the first dielectric layer based on the thickness of the first conductive layer and the second conductive layer.
11. The method of claim 10 , further comprising measuring a combined thickness of the first conductive layer, the second conductive layer, and the first dielectric layer at a third location of the stacked monitor structure.
12. The method of claim 10 , wherein measuring a thickness of the first conductive layer and the second conductive layer is characterized as non-destructive measuring.
13. The method of claim 10 , wherein the first shape and the second shape are characterized as “L” shapes formed with substantially similar width and length dimensions.
14. The method of claim 10 , wherein the first and second conductive layers comprise a copper (Cu) material.
15. The method of claim 10 , wherein the first dielectric layer comprises a resin or epoxy material.
16. A stacked monitor structure embedded in a build-up substrate, comprising:
a first shape formed in a first conductive layer of the build-up substrate;
a second shape formed in a second conductive layer of the build-up substrate, a portion of the second shape overlapping the first shape;
a first dielectric layer disposed between the first conductive layer and the second conductive layer; and
a measuring device configured to non-destructively measure a thickness of the first conductive layer at a first location on the stacked monitor structure, a thickness of the second conductive layer at a second location on the stacked monitor structure, and a combined thickness of the first conductive layer, the second conductive layer, and the first dielectric layer at a third location on the stacked monitor structure, a thickness of the first dielectric layer determined based on the thickness of the first conductive layer and the second conductive layer.
17. The stacked monitor structure of claim 16 , wherein the first dielectric is formed from a non-crystalline organic material.
18. The stacked monitor structure of claim 16 , wherein the first shape and the second shape are characterized as “L” shapes formed with substantially similar width and length dimensions.
19. The stacked monitor structure of claim 16 , wherein the third location corresponds to the portion of the second shape overlapping the first shape.
20. The stacked monitor structure of claim 16 , wherein the multi-layer substrate further includes bonding sites for attaching a semiconductor die in a flip-chip configuration, at least one of the bonding sites electrically coupled to the first conductive layer.