IP Library › Granted Patent US 10,019,258
Granted Patent B2
US 10,019,258 · App. 15/301,969 · Granted Jul 10, 2018

Hardware assisted software versioning of clustered applications

Inventors: Douglas L. Voigt (Boise, ID); Donald E. Bollinger (Monte Sereno, CA); Daniel Juergen Gmach (Palo Alto, CA); Dejan S. Milojicic (Palo Alto, CA)
Assignee: Hewlett Packard Enterprise Development LP
G06F8/71G06F8/65
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Quick Facts
Patent No.
US 10,019,258
App. No.
15/301,969
Granted
Jul 10, 2018
Kind
B2
Abstract

Examples relate to providing hardware assisted software versioning for clustered applications. In one example, virtualized global memory is accessible to application servers that provide a clustered application, where the clustered application includes multiple versions of a common data structure. After one of the application servers stores an element that is compatible with one version of the common data structure, other versions of the common data structure are located in the virtualized global memory. The element is then invalidated in the other versions of the common data structure to prevent access and translated directly in the virtualized global memory to the other versions of the common data structure. At this stage, the element can be validated in the other versions of the common data structure for access.

Claims (36)

1. A system for providing hardware assisted software versioning for clustered applications, the system comprising:

virtualized global memory storing a plurality of versions of a data structure of a cluster application, wherein the cluster application is provided by a plurality of application servers; and

a device operatively connected to the virtualized global memory, the device including a processor and a non-transitory computer readable medium storing instructions that when executed by the processor cause the processor to:

in response to a writing of a data element in a first version of the common data structure by one of the plurality of application servers, determine addresses of other versions of the data structure in the virtualized global memory;

based on the addresses of the other versions of the data structure in the virtualized global memory, render the other versions of the data structure in the virtualized global memory invalid to prevent the other versions of the data structure from being accessed;

while the other versions of the data structure in the virtualized global memory are invalid, translate the data element written in the first version of the data structure to the other versions of the data structure directly in the virtualized global memory; and

after the data element has been translated to the other versions of the data structure in the virtualized global memory, render the other versions of the data structure in the virtualized global memory valid to allow the other versions of the data structure to be accessed.

2. The system of claim 1 , wherein the data element is translated in response to a request to access the data element from a requesting server of the plurality of application servers.

3. The system of claim 1 , wherein, to translate the data element directly in the virtualized global memory, the instructions are to cause the processor to utilize a bit mask to expand or contract the data element in the other versions of the data structure in the virtualized global memory.

4. The system of claim 1 , wherein, to translate the data element directly in the virtualized global memory, the instructions are to cause the processor to perform an arithmetic derivation of the data element in the other versions of the data structure in the virtualized global memory.

5. The system of claim 1 , wherein, to translate the data element directly in the virtualized global memory, the instructions are to cause the processor to invoke a translation interrupt that triggers a software function to translate the data element.

6. The system of claim 1 , wherein, to translate the data element to each version of the other versions of the data structure in the virtualized global memory, the instructions are to cause the processor to:

invoke a selected translation, and

identify the selected translation from a plurality of translators based on the first version of the data structure and a target version of the other versions of the data structure, wherein the plurality of translators comprises an arithmetic derivation translator and a function translator.

7. A method for providing hardware assisted software versioning for clustered applications, the method comprising:

receiving a notification that one of a plurality of application servers has written an element in a first version of a data structure of a cluster application, wherein the plurality of application servers provides the clustered application that comprises a plurality of versions of the data structure;

in response to the element being written in the first version of the data structure, determining, by a processor of a computing device, addresses of other versions of the data structure in virtualized global memory of the clustered application;

based on the addresses of the other versions of the data structure in the virtualized global memory, rendering, by the processor, the other versions of the data structure in the virtualized global memory invalid to prevent the other versions of the data structure from being accessed;

while the other versions of the data structure in the virtualized global memory are invalid, translating, by the processor, the element to the other versions of the data structure directly in the virtualized global memory; and

after the element has been translated to the other versions of the data structure in the virtualized global memory, rendering, by the processor, the other versions of the data structure in the virtualized global memory valid to allow the other versions of the data structure to be accessed.

8. The method of claim 7 , wherein the element is translated in response to a request to access the element from a requesting server of the plurality of application servers.

9. The method of claim 7 , wherein translating the element directly in the virtualized global memory includes using a bit mask to expand or contract the element in the other versions of the data structure in the virtualized global memory.

10. The method of claim 7 , wherein translating the element directly in the virtualized global memory includes invoking a translation interrupt that triggers a software function to translate the element.

11. The method of claim 7 , wherein translating the element to each version of the other versions of the data structure in the virtualized global memory includes invoking a selected translation, and wherein the method further comprises:

identifying the selected translation from a plurality of translators based on the first version of the data structure and a target version of the other versions of the data structure, wherein the plurality of translators comprises an arithmetic derivation translator and a function translator.

12. A non-transitory machine-readable storage medium encoded with instructions executable by a processor for providing hardware assisted software versioning for clustered applications, the non-transitory machine-readable storage medium storing instructions that when executed by the processor cause the processor to:

receive a notification that an initial server of a plurality of application servers has written an element in a first version of a data structure of a cluster application, wherein the plurality of application servers provides the clustered application that comprises a plurality of versions of the data structure;

in response to the writing of the element in the first version of the data structure, determine addresses of other versions of the data structure in virtualized global memory;

based on the addresses of the other versions of the data structure in the virtualized global memory, render the other versions of the data structure in the virtualized global memory invalid to prevent the other versions of the data structure from being accessed;

while the other versions of the data structure in the virtualized global memory are invalid and in response to a request to access the element from a requesting server of the plurality of application servers, translate the element written in the first version to the other versions of the data structure directly in the virtualized global memory; and

after the element has been translated to the other versions of the data structure in the virtualized global memory, render the other versions of the data structure valid to allow the other versions containing the element to be accessed.

13. The non-transitory machine-readable storage medium of claim 12 , wherein to translate the element directly in the virtualized global memory, the instructions are to cause the processor to use a bit mask to expand or contract the element in the other versions of the data structure in the virtualized global memory.

14. The non-transitory machine-readable storage medium of claim 12 , wherein, to translate the element directly in the virtualized global memory, the instructions are to cause the processor to invoke a translation interrupt that triggers a software function to translate the element.

15. The non-transitory machine-readable storage medium of claim 12 , wherein, to translate the element to each version of the other versions of the data structure in the virtualized global memory, the instructions are to cause the processor to:

invoke a selected translation, and

identify the selected translation from a plurality of translators based on the first version of the data structure and a target version of the other versions of the data structure, wherein the plurality of translators comprises an arithmetic derivation translator and a function translator.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 5, 2016
From: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
To: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Reel/Frame 040228/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 5, 2016
From: VOIGT, DOUGLAS L.; BOLLINGER, DONALD E.; GMACH, DANIEL JUERGEN; MILOJICIC, DEJAN S.
To: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
Reel/Frame 039942/0066 →
Continuity (1)
Related Publication 20170132000A1 · May 11, 2017