Switches coupling volatile memory devices to a power source

1. A system comprising:

a first volatile memory device;

a second volatile memory device;

a first switch connected to the first volatile memory device;

a second switch connected to the second volatile memory device, wherein each of the first and second switches, when closed, couples the respective volatile memory device to a power source; and

a controller communicatively coupled to the first and second volatile memory devices and the first and second switches, wherein the controller is to:

open the first switch after data is copied from the first volatile memory device to non-volatile memory, and while the second switch is closed; and

copy data from the second volatile memory device to the non-volatile memory after the first switch is opened.

2. The system of claim 1 , wherein:

the first and second switches comprise first and second field-effect transistors (FETs), respectively; and

the controller is to control gate voltages of the first and second FETs.

3. The system of claim 1 , wherein the power source comprises a battery or a supercapacitor.

4. The system of claim 1 , wherein the controller comprises a field programmable gate array (FPGA) or a double data rate (DDR) buffer.

5. The system of claim 1 , further comprising:

a third volatile memory device; and

a third switch connected to the third volatile memory device, wherein:

the power source is a backup power source; the first, second, and third volatile memory devices are coupled to the backup power source when a main power source ceases to power the first, second, and third volatile memory devices;

the third switch, when closed, couples the third volatile memory device to the backup power source;

the controller is to open the second switch after data is copied from the second volatile memory device to the non-volatile memory and while the third switch is closed; and

data is copied from the third volatile memory device to the non-volatile memory after the second switch is opened.

6. A memory module controller comprising instructions that cause the memory module controller to:

close a plurality of switches on a memory module, wherein:

each of the plurality of switches is connected to a respective one of a plurality of volatile memory devices on the memory module; and

each of the plurality of switches, when closed, couples the respective volatile memory device to a power source;

copy data from the plurality of volatile memory devices to non-volatile memory; and

open each of the plurality of switches after data is copied from the respective volatile memory device to the non-volatile memory, wherein:

switches connected to volatile memory devices, whose data has already been copied to the non-volatile memory, are open while switches connected to volatile memory devices, whose data has not yet been copied to the non-volatile memory, are closed.

7. The memory module controller of claim 6 , wherein:

the power source is a backup power source; and

the plurality of volatile memory devices are coupled to the backup power source when a main power source ceases to power the plurality of volatile memory devices.

8. The memory module controller of claim 6 , further comprising instructions that cause the memory module controller to:

determine whether copying of data from one of the plurality of volatile memory devices to the non-volatile memory has been completed; and

transmit, in response to a determination that copying of data from the one of the plurality of volatile memory devices to the non-volatile memory has been completed, a command to open the respective switch connected to the one of the plurality of volatile memory devices.

9. The memory module controller of claim 6 , wherein the plurality of switches comprise field-effect transistors (FETs), the memory module controller further comprising instructions that cause the memory module controller to:

determine whether copying of data from one of the plurality of volatile memory devices to the non-volatile memory has been completed; and

change, in response to a determination that copying of data from the one of the plurality of volatile memory devices to the non-volatile memory has been completed, a gate voltage of a FET connected to the one of the plurality of volatile memory devices.

10. The memory module controller of claim 6 , wherein the power source comprises a battery or a supercapacitor.

11. The memory module controller of claim 6 , wherein the plurality of volatile memory devices comprises dynamic random-access memory (DRAM) devices.

12. A method comprising:

copying data from a first volatile memory device on a memory module to non-volatile memory;

ceasing to power the first volatile memory device after data is copied from the first volatile memory device to the non-volatile memory while powering a second volatile memory device on the memory module;

copying, after the first volatile memory device has ceased to be powered, data from the second volatile memory device on the memory module to the non-volatile memory; and

ceasing to power the second volatile memory device after data is copied from the second volatile memory device to the non-volatile memory.

13. The method of claim 12 , wherein:

the first and second volatile memory devices are connected to first and second switches, respectively;

each of the first and second switches, when closed, couples the respective volatile memory device to a power source;

ceasing to power the first volatile memory device comprises opening the first switch; and

ceasing to power the second volatile memory device comprises opening the second switch.

14. The method of claim 13 , wherein each of the first and second switches comprises a field-effect transistor (FET), the method further comprising:

determining whether copying of data from one of the first and second volatile memory devices to the non-volatile memory has been completed; and

changing, in response to a determination that copying of data from the one of the first and second volatile memory devices to the non-volatile memory has been completed, a gate voltage of a FET connected to the one of the first and second volatile memory devices.

15. The method of claim 12 , wherein the power source is a backup power source, the method further comprising:

powering the first and second volatile memory devices and a third volatile memory device with the backup power source when a main power source is disconnected from the first, second, and third volatile memory devices;

copying, after the second volatile memory device has ceased to be powered, data from the third volatile memory device to the non-volatile memory; and

ceasing to power the third volatile memory device after data is copied from the third volatile memory device to the non-volatile memory.

16. The system of claim 1 , wherein opening the first switch after data is copied comprises opening the first switch in response to a determination that that a first copy of the data from the first volatile memory to the non-volatile memory is complete.

17. The system of claim 1 , wherein opening the first switch causes the first volatile memory device to cease to be powered.

18. The system of claim 5 , wherein opening the second switch after data is copied comprises opening the second switch in response to a determination that that a second copy of the data from the second volatile memory to the non-volatile memory is complete.

19. The system of claim 5 , wherein opening the second switch causes the second volatile memory device to cease to be powered.

20. The system of claim 1 , wherein the power source comprises a main power source and a backup power source.